Specification Test Compaction for Analog Circuits and MEMS
Testing a non-digital integrated system against all of its specifications can be quite expensive due to the elaborate test application and measurement setup required.We propose to eliminate redundant tests by employing ε-SVM based statistical learning.Application of the proposed methodology to an op...
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| Vydané v: | Design, Automation and Test in Europe s. 164 - 169 |
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| Hlavní autori: | , , , |
| Médium: | Konferenčný príspevok.. |
| Jazyk: | English |
| Vydavateľské údaje: |
Washington, DC, USA
IEEE Computer Society
07.03.2005
IEEE |
| Edícia: | ACM Conferences |
| Predmet: | |
| ISBN: | 9780769522883, 0769522882 |
| ISSN: | 1530-1591 |
| On-line prístup: | Získať plný text |
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| Shrnutí: | Testing a non-digital integrated system against all of its specifications can be quite expensive due to the elaborate test application and measurement setup required.We propose to eliminate redundant tests by employing ε-SVM based statistical learning.Application of the proposed methodology to an operational amplifier and a MEMS accelerometer reveal that redundant tests can be statistically identified from a complete set of specification-based tests with negligible error. Specifically, after eliminating five of eleven specification-based tests for an operational amplifier, the defect escape and yield loss is small at 0.6% and 0.9%, respectively.For the accelerometer, defect escape of 0.2% and yield loss of 0.1% occurs when the hot and colt tests are eliminated.For the accelerometer, this level of Compaction would reduce test cost by more than half. |
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| Bibliografia: | SourceType-Conference Papers & Proceedings-1 ObjectType-Conference Paper-1 content type line 25 |
| ISBN: | 9780769522883 0769522882 |
| ISSN: | 1530-1591 |
| DOI: | 10.1109/DATE.2005.277 |

