Chien, Y., Chen, D., Lou, J., Ma, G., Rutenbar, R. A., & Mukherjee, T. (2005, March 7). Designer-Driven Topology Optimization for Pipelined Analog to Digital Converters. Design, Automation and Test in Europe, 279-280. https://doi.org/10.1109/DATE.2005.119
Chicago-Zitierstil (17. Ausg.)Chien, Yu-Tsun, Dong Chen, Jea-Hong Lou, Gin-Kou Ma, Rob A. Rutenbar, und Tamal Mukherjee. "Designer-Driven Topology Optimization for Pipelined Analog to Digital Converters." Design, Automation and Test in Europe 7 Mar. 2005: 279-280. https://doi.org/10.1109/DATE.2005.119.
MLA-Zitierstil (9. Ausg.)Chien, Yu-Tsun, et al. "Designer-Driven Topology Optimization for Pipelined Analog to Digital Converters." Design, Automation and Test in Europe, 7 Mar. 2005, pp. 279-280, https://doi.org/10.1109/DATE.2005.119.