Virtualizing Transactional Memory

Writing concurrent programs is difficult because of the complexity of ensuring proper synchronization. Conventional lock-based synchronization suffers from wellknown limitations, so researchers have considered non-blocking transactions as an alternative. Recent hardware proposals have demonstrated h...

Full description

Saved in:

Bibliographic Details
Published in:	32nd International Symposium on Computer Architecture (ISCA'05) pp. 494 - 505
Main Authors:	Rajwar, Ravi, Herlihy, Maurice, Lai, Konrad
Format:	Conference Proceeding
Language:	English
Published:	Washington, DC, USA IEEE Computer Society 01.05.2005 IEEE
Series:	ACM Conferences
Subjects:	Computer architecture Computing methodologies > Concurrent computing methodologies > Concurrent programming languages Delay Hardware Hardware > Communication hardware, interfaces and storage Hardware > Communication hardware, interfaces and storage > Buses and high-speed links Hardware > Electronic design automation > High-level and register-transfer level synthesis Hardware > Integrated circuits > Semiconductor memory Microarchitecture Programming profession Proposals Read-write memory Scheduling Software and its engineering > Software notations and tools > General programming languages > Language types > Concurrent programming languages Switches Theory of computation > Models of computation > Concurrency Theory of computation > Models of computation > Concurrency > Parallel computing models Yarn
ISBN:	076952270X, 9780769522708
ISSN:	1063-6897
Online Access:	Get full text
Tags:	Add Tag No Tags, Be the first to tag this record!

Be the first to leave a comment!