Bandwidth Steering in HPC Using Silicon Nanophotonics

As bytes-per-FLOP ratios continue to decline, communication is becoming a bottleneck for performance scaling. This paper describes bandwidth steering in HPC using emerging reconfigurable silicon photonic switches. We demonstrate that placing photonics in the lower layers of a hierarchical topology e...

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Vydané v:	SC19: International Conference for High Performance Computing, Networking, Storage and Analysis s. 1 - 25
Hlavní autori:	Michelogiannakis, George, Shen, Yiwen, Teh, Min Yee, Meng, Xiang, Aivazi, Benjamin, Groves, Taylor, Shalf, John, Glick, Madeleine, Ghobadi, Manya, Dennison, Larry, Bergman, Keren
Médium:	Konferenčný príspevok..
Jazyk:	English
Vydavateľské údaje:	ACM 17.11.2019
Predmet:	Bandwidth Hardware Nanophotonics Network topology Optical network units Optical switches Power demand Silicon photonics Throughput Topology
ISSN:	2167-4337
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