RippleFPGA: A routability-driven placement for large-scale heterogeneous FPGAs

As the complexity and scale of FPGA circuits grows, resolving routing congestion becomes more important in FPGA placement. In this paper, we propose a routability-driven placement algorithm for large-scale heterogeneous FPGAs. Our proposed algorithm consists of (1) partitioning, (2) packing, (3) glo...

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Vydáno v:	Digest of technical papers - IEEE/ACM International Conference on Computer-Aided Design s. 1 - 8
Hlavní autoři:	Chak-Wa Pui, Gengjie Chen, Wing-Kai Chow, Ka-Chun Lam, Jian Kuang, Peishan Tu, Hang Zhang, Young, Evangeline F. Y., Bei Yu
Médium:	Konferenční příspěvek
Jazyk:	angličtina
Vydáno:	ACM 01.11.2016
Témata:	Clustering algorithms Computer architecture Digital signal processing Field programmable gate arrays Partitioning algorithms Random access memory Routing
ISSN:	1558-2434
On-line přístup:	Získat plný text
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Popis
Shrnutí:	As the complexity and scale of FPGA circuits grows, resolving routing congestion becomes more important in FPGA placement. In this paper, we propose a routability-driven placement algorithm for large-scale heterogeneous FPGAs. Our proposed algorithm consists of (1) partitioning, (2) packing, (3) global placement with congestion estimation, (4) window-base legalization, and (5) routing resource-aware detailed placement. Experimental results show that our proposed approach can give routable placement results for all the benchmarks in the ISPD2016 contest and can achieve good result compared to the other wining teams of the ISPD2016 contest.
ISSN:	1558-2434
DOI:	10.1145/2966986.2980084