Executing synchronous dataflow graphs on a SPM-based multicore architecture

In this paper we are concerned about executing synchronous dataflow (SDF) applications on a multicore architecture where a core has a limited size of scratchpad memory (SPM). Unlike traditional multi-processor scheduling of SDF graphs, we consider the SPM size limitation that incurs code and data ov...

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Veröffentlicht in:DAC Design Automation Conference 2012 S. 664 - 671
Hauptverfasser: Choi, Junchul, Oh, Hyunok, Kim, Sungchan, Ha, Soonhoi
Format: Tagungsbericht
Sprache:Englisch
Veröffentlicht: New York, NY, USA ACM 03.06.2012
IEEE
Schriftenreihe:ACM Conferences
Schlagworte:
Computing methodologies > Concurrent computing methodologies > Concurrent programming languages
Delay
memory overlay
multicore architecture
Multicore processing
Multiprocessor scheduling
Prefetching
Schedules
scratch pad memory
Software and its engineering > Software notations and tools > General programming languages > Language types > Concurrent programming languages
synchronous dataflow
Tiles
scratch pad memory
synchronous dataflow
memory overlay
multiprocessor scheduling
prefetching
multicore architecture
ISBN:1450311997, 9781450311991
ISSN:0738-100X
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Zusammenfassung:In this paper we are concerned about executing synchronous dataflow (SDF) applications on a multicore architecture where a core has a limited size of scratchpad memory (SPM). Unlike traditional multi-processor scheduling of SDF graphs, we consider the SPM size limitation that incurs code and data overlay overhead. Since the scheduling problem is intractable, we propose an EA(evolutionary algorithm)-based technique. To hide memory latency, prefetching is aggressively performed in the proposed technique. The experimental results show that our approach reduces the overlay overhead significantly compared to a non-optimized approach and the previous approach.
ISBN:1450311997
9781450311991
ISSN:0738-100X
DOI:10.1145/2228360.2228480