CROW: A Low-Cost Substrate for Improving DRAM Performance, Energy Efficiency, and Reliability
DRAM has been the dominant technology for architecting main memory for decades. Recent trends in multi-core system design and large-dataset applications have amplified the role of DRAM as a critical system bottleneck. We propose Copy-Row DRAM (CROW), a flexible substrate that enables new mechanisms...
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| Veröffentlicht in: | 2019 ACM/IEEE 46th Annual International Symposium on Computer Architecture (ISCA) S. 129 - 142 |
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| Sprache: | Englisch |
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01.06.2019
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| ISSN: | 2575-713X |
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| Abstract | DRAM has been the dominant technology for architecting main memory for decades. Recent trends in multi-core system design and large-dataset applications have amplified the role of DRAM as a critical system bottleneck. We propose Copy-Row DRAM (CROW), a flexible substrate that enables new mechanisms for improving DRAM performance, energy efficiency, and reliability. We use the CROW substrate to implement 1) a low-cost in-DRAM caching mechanism that lowers DRAM activation latency to frequently-accessed rows by 38% and 2) a mechanism that avoids the use of short-retention-time rows to mitigate the performance and energy overhead of DRAM refresh operations. CROW's flexibility allows the implementation of both mechanisms at the same time. Our evaluations show that the two mechanisms synergistically improve system performance by 20.0% and reduce DRAM energy by 22.3% for memory-intensive four-core workloads, while incurring 0.48% extra area overhead in the DRAM chip and 11.3KiB storage overhead in the memory controller, and consuming 1.6% of DRAM storage capacity, for one particular implementation. |
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| AbstractList | DRAM has been the dominant technology for architecting main memory for decades. Recent trends in multi-core system design and large-dataset applications have amplified the role of DRAM as a critical system bottleneck. We propose Copy-Row DRAM (CROW), a flexible substrate that enables new mechanisms for improving DRAM performance, energy efficiency, and reliability. We use the CROW substrate to implement 1) a low-cost in-DRAM caching mechanism that lowers DRAM activation latency to frequently-accessed rows by 38% and 2) a mechanism that avoids the use of short-retention-time rows to mitigate the performance and energy overhead of DRAM refresh operations. CROW's flexibility allows the implementation of both mechanisms at the same time. Our evaluations show that the two mechanisms synergistically improve system performance by 20.0% and reduce DRAM energy by 22.3% for memory-intensive four-core workloads, while incurring 0.48% extra area overhead in the DRAM chip and 11.3KiB storage overhead in the memory controller, and consuming 1.6% of DRAM storage capacity, for one particular implementation. |
| Author | Patel, Minesh Yaglikci, A. Giray Ghose, Saugata Kim, Jeremie S. Mutlu, Onur Hassan, Hasan Vijaykumar, Nandita Ghiasi, Nika Mansouri |
| Author_xml | – sequence: 1 givenname: Hasan surname: Hassan fullname: Hassan, Hasan organization: ETH Zürich – sequence: 2 givenname: Minesh surname: Patel fullname: Patel, Minesh organization: ETH Zürich – sequence: 3 givenname: Jeremie S. surname: Kim fullname: Kim, Jeremie S. organization: Carnegie Mellon University – sequence: 4 givenname: A. Giray surname: Yaglikci fullname: Yaglikci, A. Giray organization: ETH Zürich – sequence: 5 givenname: Nandita surname: Vijaykumar fullname: Vijaykumar, Nandita organization: Carnegie Mellon University – sequence: 6 givenname: Nika Mansouri surname: Ghiasi fullname: Ghiasi, Nika Mansouri organization: ETH Zürich – sequence: 7 givenname: Saugata surname: Ghose fullname: Ghose, Saugata organization: Carnegie Mellon University – sequence: 8 givenname: Onur surname: Mutlu fullname: Mutlu, Onur organization: Carnegie Mellon University |
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| Snippet | DRAM has been the dominant technology for architecting main memory for decades. Recent trends in multi-core system design and large-dataset applications have... |
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| SubjectTerms | Computer architecture DRAM DRAM chips energy Energy conservation Energy efficiency memory systems power Random access memory Reliability Substrates System performance |
| Title | CROW: A Low-Cost Substrate for Improving DRAM Performance, Energy Efficiency, and Reliability |
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