Kulkarni, N., Nukala, N., & Vrudhula, S. (2012, November 5). Minimizing area and power of sequential CMOS circuits using threshold decomposition. 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 605-612. https://doi.org/10.1145/2429384.2429514
Citace podle Chicago (17th ed.)Kulkarni, Niranjan, Nishant Nukala, a Sarma Vrudhula. "Minimizing Area and Power of Sequential CMOS Circuits Using Threshold Decomposition." 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) 5 Nov. 2012: 605-612. https://doi.org/10.1145/2429384.2429514.
Citace podle MLA (9th ed.)Kulkarni, Niranjan, et al. "Minimizing Area and Power of Sequential CMOS Circuits Using Threshold Decomposition." 2012 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 5 Nov. 2012, pp. 605-612, https://doi.org/10.1145/2429384.2429514.