Variation-Aware Application Scheduling and Power Management for Chip Multiprocessors

Within-die process variation causes individual cores in a ChipMultiprocessor (CMP) to differ substantially in both static powerconsumed and maximum frequency supported. In this environment,ignoring variation effects whenscheduling applications or when managing power withDynamic Voltage and Frequency...

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Vydané v:2008 International Symposium on Computer Architecture s. 363 - 374
Hlavní autori: Teodorescu, Radu, Torrellas, Josep
Médium: Konferenčný príspevok..
Jazyk:English
Vydavateľské údaje: Washington, DC, USA IEEE Computer Society 01.06.2008
IEEE
Edícia:ACM Conferences
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ISBN:9780769531748, 0769531741
ISSN:1063-6897
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Shrnutí:Within-die process variation causes individual cores in a ChipMultiprocessor (CMP) to differ substantially in both static powerconsumed and maximum frequency supported. In this environment,ignoring variation effects whenscheduling applications or when managing power withDynamic Voltage and Frequency Scaling (DVFS) is suboptimal. This paper proposes variation-aware algorithms for applicationscheduling and power management. One such power managementalgorithm, called {\em LinOpt}, uses linear programmingto find the best voltage and frequency levels for each of thecores in the CMP --- maximizing throughput at a given power budget.In a 20-core CMP, the combination of variation-awareapplication scheduling and {\em LinOpt} increases the averagethroughput by 12--17\% and reduces the average $ED^2$ by 30--38\%--- all relative to using variation-awarescheduling together with a simple extension to Intel's Foxtonpower management algorithm.
ISBN:9780769531748
0769531741
ISSN:1063-6897
DOI:10.1109/ISCA.2008.40