Verification of hardware implementations through correctness of their recursive definitions in PVS

An approach is introduced to formally verify the logical correctness of reconfigurable hardware implementations of algebraic operators. Since Hardware Description Languages describe circuits/systems in an imperative style and formalization tools use recursive specification languages, the kernel of o...

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Vydané v:	2014 27th Symposium on Integrated Circuits and Systems Design (SBCCI) s. 1 - 8
Hlavní autori:	Alves Almeida, Ariane, Arias-Garcia, Janier, Llanos, Carlos H., Ayala-Rincon, Mauricio
Médium:	Konferenčný príspevok..
Jazyk:	English
Vydavateľské údaje:	IEEE 01.09.2014
Predmet:	Algorithm design and analysis Clocks Field programmable gate arrays Finite element analysis Formal Verification Hardware Hardware Verification Libraries Random access memory Recursive Definitions
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