An elastic software cache with fast prefetching for motion compensation in video decoding

Real-time decoding of ultrahigh resolution video using multicore architectures is important for future embedded systems. However, memory bandwidth is still a bottleneck of system performance. Video coding performs irregular DRAM access resulting in very low and unstable efficiency. The conventional...

Full description

Saved in:
Bibliographic Details
Published in:Proceedings of the Eighth Ieee/Acm/Ifip International Conference on Hardware/Software Codesign and System Synthesis pp. 23 - 32
Main Authors: Chao, Ping, Lin, Youn-Long
Format: Conference Proceeding
Language:English
Published: New York, NY, USA ACM 24.10.2010
IEEE
Series:ACM Conferences
Subjects:
Bandwidth
Decoding
H.264/AVC
Memory Access Optimization
Merging
Motion Compensation
Motion segmentation
Prefetching
Random access memory
Software and its engineering > Software notations and tools > Compilers
Software and its engineering > Software organization and properties > Contextual software domains > Operating systems > Memory management
Software and its engineering > Software organization and properties > Contextual software domains > Operating systems > Memory management > Garbage collection
Software Cache
Video Decoding
memory access optimization
software cache
video decoding
h.264/avc
motion compensation
ISBN:1605589055, 9781605589053
Online Access:Get full text
Tags: Add Tag
No Tags, Be the first to tag this record!
Description
Summary:Real-time decoding of ultrahigh resolution video using multicore architectures is important for future embedded systems. However, memory bandwidth is still a bottleneck of system performance. Video coding performs irregular DRAM access resulting in very low and unstable efficiency. The conventional cache approach is insufficient because it reduces only the redundant accesses to data that has already been fetched during prior-macroblock decoding. We present an Elastic Software Cache (ESC) for ultrahigh resolution video decoding on Scratchpad Memory (SPM)-based systems. Utilizing access region analysis, our latency-optimized prefetching scheme rearranges accesses to minimize both data redundancy and DRAM access latency. Compared to the conventional cache approach, our scheme requires only 4.6 Kbytes of SPM space but it can save up to 25% of memory access cycles resulting in both higher performance and lower power.
ISBN:1605589055
9781605589053
DOI:10.1145/1878961.1878967