A 1.2nJ/Classification Fully Synthesized All-Digital Asynchronous Wired-Logic Processor Using Quantized Non-Linear Function Blocks in 0.18μm CMOS

A 5.3 times smaller and 2.6 times more energy-efficient all-digital wired-logic processor which infers MNIST with 90.6% accuracy and 1.2nJ of energy consumption has been developed. To improve area efficiency of wired-logic architecture, nonlinear neural network (NNN), which is a neuron and synapse e...

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Bibliographic Details
Published in:	Proceedings of the 28th Asia and South Pacific Design Automation Conference pp. 180 - 181
Main Authors:	Sumikawa, Rei, Shiba, Kota, Kosuge, Atsutake, Hamada, Mototsugu, Kuroda, Tadahiro
Format:	Conference Proceeding
Language:	English
Published:	New York, NY, USA ACM 16.01.2023
Series:	ACM Conferences
Subjects:	Computer systems organization Computer systems organization > Architectures Computer systems organization > Architectures > Other architectures Computer systems organization > Architectures > Other architectures > Neural networks Hardware Hardware > Emerging technologies Hardware > Integrated circuits Hardware > Integrated circuits > Interconnect Hardware > Integrated circuits > Interconnect > Input > output circuits Hardware > Integrated circuits > Logic circuits Hardware > Very large scale integration design Hardware > Very large scale integration design > Application-specific VLSI designs Hardware > Very large scale integration design > Application-specific VLSI designs > Application specific processors
ISBN:	9781450397834, 1450397832
Online Access:	Get full text
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