Verification of digital circuits based on formal semantics of a hardware description language

Reasoning about properties of hardware behaviour needs a formal method. The more this process can be mechanized the more practicable is it. In this paper, basic concepts of a special verification system for the formal verification of digital circuits are presented. Higher-order Logic serves as the f...

Celý popis

Uloženo v:
Podrobná bibliografie
Vydáno v:Euro-DAC '92, European Design Automation Conference : Euro-VHDL '92, Congress Centrum Hamburg, Hamburg, Germany, September 7-10, 1992 s. 98 - 103
Hlavní autor: Mutz, Matthias
Médium: Konferenční příspěvek Journal Article
Jazyk:angličtina
Vydáno: Los Alamitos, CA, USA IEEE Computer Society Press 1992
Edice:ACM Conferences
Témata:
Computing methodologies > Symbolic and algebraic manipulation > Symbolic and algebraic algorithms > Theorem proving algorithms
Hardware > Electronic design automation > Hardware description languages and compilation
Hardware > Hardware validation > Functional verification
Theory of computation > Models of computation > Computability
ISBN:0818627808, 9780818627804
On-line přístup:Získat plný text
Tagy: Přidat tag
Žádné tagy, Buďte první, kdo vytvoří štítek k tomuto záznamu!
Popis
Shrnutí:Reasoning about properties of hardware behaviour needs a formal method. The more this process can be mechanized the more practicable is it. In this paper, basic concepts of a special verification system for the formal verification of digital circuits are presented. Higher-order Logic serves as the formalism to define the underlying theory.
Bibliografie:ObjectType-Article-2
SourceType-Scholarly Journals-1
ObjectType-Feature-1
content type line 23
SourceType-Conference Papers & Proceedings-1
ObjectType-Conference Paper-1
content type line 25
ISBN:0818627808
9780818627804
DOI:10.5555/159754.161737