ReChisel: Effective Automatic Chisel Code Generation by LLM with Reflection

Coding with hardware description languages (HDLs) such as Verilog is a time-intensive and laborious task. With the rapid advancement of large language models (LLMs), there is increasing interest in applying LLMs to assist with HDL coding. Recent efforts have demonstrated the potential of LLMs in tra...

Ausführliche Beschreibung

Bibliographische Detailangaben

Veröffentlicht in:	2025 62nd ACM/IEEE Design Automation Conference (DAC) S. 1 - 7
Hauptverfasser:	Niu, Juxin, Liu, Xiangfeng, Niu, Dan, Wang, Xi, Jiang, Zhe, Guan, Nan
Format:	Tagungsbericht
Sprache:	Englisch
Veröffentlicht:	IEEE 22.06.2025
Schlagworte:	Benchmark testing Codes Design automation Encoding Hardware Hardware design languages Large language models Next generation networking Reflection Translation
Online-Zugang:	Volltext
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!