BoolE: Exact Symbolic Reasoning via Boolean Equality Saturation

Boolean symbolic reasoning for gate-level netlists is a critical step in verification, logic and datapath synthesis, and hardware security. Specifically, reasoning datapath and adder tree in bit-blasted Boolean networks is particularly crucial for verification and synthesis, and challenging. Convent...

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Bibliographic Details

Published in:	2025 62nd ACM/IEEE Design Automation Conference (DAC) pp. 1 - 7
Main Authors:	Yin, Jiaqi, Song, Zhan, Chen, Chen, Hu, Qihao, Yu, Cunxi
Format:	Conference Proceeding
Language:	English
Published:	IEEE 22.06.2025
Subjects:	Adders Cognition Formal verification Hardware security Learning systems Logic gates Machine learning algorithms Optimization Runtime Scalability
Online Access:	Get full text
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