Single stage static level shifter design for subthreshold to I/O voltage conversion

A static subthreshold to I/O voltage level shifter is proposed. The proposed circuit employs a diode-connected pull-up transistor stack and a feedback structure to alleviate the drive strength requirement on the pull-down transistors. The proposed level shifter achieves less than 6 FO4 inverter dela...

Celý popis

Uložené v:
Podrobná bibliografia
Vydané v:Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08) s. 197 - 200
Hlavní autori: Lin, Yi-Shiang, Sylvester, Dennis M.
Médium: Konferenčný príspevok..
Jazyk:English
Vydavateľské údaje: New York, NY, USA ACM 11.08.2008
IEEE
Edícia:ACM Conferences
Predmet:
Delay
Diodes
Energy consumption
Feedback circuits
Hardware > Integrated circuits > Logic circuits > Combinational circuits
Inverters
level shifter
Logic design
Low voltage
Permission
subthreshold
Switches
Temperature
subthreshold
level shifter
ISBN:9781605581095, 1605581097, 9781424486342, 1424486343
On-line prístup:Získať plný text
Tagy: Pridať tag
Žiadne tagy, Buďte prvý, kto otaguje tento záznam!
Popis
Shrnutí:A static subthreshold to I/O voltage level shifter is proposed. The proposed circuit employs a diode-connected pull-up transistor stack and a feedback structure to alleviate the drive strength requirement on the pull-down transistors. The proposed level shifter achieves less than 6 FO4 inverter delay under process and temperature variation when converting the input from 300mV to 2.5V. Compared to a conventional DCVS design, the new design consumes 8 times less power and is 10% faster under room temperature.
ISBN:9781605581095
1605581097
9781424486342
1424486343
DOI:10.1145/1393921.1393973