A flexible and fast software implementation of the FFT on the BPE platform

The importance of having an efficient Fast Fourier Transform (FFT) implementation is universally recognized as one of the key enablers for the development of new and more powerful signal processing algorithms. In the field of telecommunications, one of its most recent applications is the Orthogonal...

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Vydáno v:Proceedings of the Conference on Design, Automation and Test in Europe s. 1467 - 1470
Hlavní autoři: Cupaiuolo, Teo, Iacono, Daniele Lo
Médium: Konferenční příspěvek
Jazyk:angličtina
Vydáno: San Jose, CA, USA EDA Consortium 12.03.2012
Edice:ACM Conferences
Témata:
Computer systems organization > Dependable and fault-tolerant systems and networks
General and reference > Cross-computing tools and techniques > Performance
Mathematics of computing > Mathematical analysis > Functional analysis > Approximation
Mathematics of computing > Mathematical analysis > Numerical analysis > Computation of transforms
Networks > Network performance evaluation
Theory of computation > Design and analysis of algorithms > Approximation algorithms analysis
vector processors
software fast fourier transform (FFT)
component
software defined radio (SDR)
SIMD
VLIW architectures
ISBN:3981080181, 9783981080186
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Popis
Shrnutí:The importance of having an efficient Fast Fourier Transform (FFT) implementation is universally recognized as one of the key enablers for the development of new and more powerful signal processing algorithms. In the field of telecommunications, one of its most recent applications is the Orthogonal Frequency Division Multiplexing (OFDM) modulation technique, whose superiority is recognized and endorsed by several standards. However, the horizon of standards is so wide and heterogeneous that a single FFT implementation hardly satisfies them all. In order to have a reusable, easily extensible and reconfigurable solution, most of the baseband processing is moving towards a software implementation: to this end several new Digital Signal Processor (DSP) architectures are emerging, each with its own set of differentiating properties. Within this context, we propose a software implementation of the FFT on the Block Processing Engine (BPE) platform. Several implementations have been investigated, ranging from a single instruction based approach, to others employing several instructions either in parallel or in pipeline. The outcome is a flexible set of solutions that leaves degrees of freedom in terms of computational load, achievable throughput and power consumption. The proposed implementations closely approach the theoretical clock cycles expected by dedicated hardware counterpart, thus making it a concrete alternative.
ISBN:3981080181
9783981080186
DOI:10.5555/2492708.2493067