High-level Estimation and Exploration of Reliability for Multi-Processor System-on-Chip
This book introduces a novel framework for accurately modeling the errors in nanoscale CMOS technology and developing a smooth tool flow at high-level design abstractions to estimate and mitigate the effects of errors. The book presents novel techniques for high-level fault simulation and reliabilit...
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| Hlavní autor: | |
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| Médium: | Elektronický zdroj E-kniha |
| Jazyk: | angličtina |
| Vydáno: |
Singapore :
Springer Singapore ,
2018.
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| Vydání: | 1st ed. 2018. |
| Edice: | Computer Architecture and Design Methodologies,
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| Témata: | |
| ISBN: | 9789811010736 |
| ISSN: | 2367-3478 |
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Obsah:
- Introduction
- Background
- Related Work
- High-level Fault Injection and Simulation
- Architectural Reliability Estimation
- Architectural Reliability Exploration
- System-level Reliability Exploration
- Conclusion and Outlook.