Selecting an error correction code type for a memory device
Uložené v:
| Názov: | Selecting an error correction code type for a memory device |
|---|---|
| Patent Number: | 11880,277 |
| Dátum vydania: | January 23, 2024 |
| Appl. No: | 16/582358 |
| Application Filed: | September 25, 2019 |
| Abstrakt: | Selecting an error correction code type for a memory device includes: selecting, by the memory device in dependence upon predefined selection criteria, one of a plurality of error correction code types and carrying out memory access requests utilizing the selected error correction code type. |
| Inventors: | ADVANCED MICRO DEVICES, INC. (Santa Clara, CA, US) |
| Assignees: | ADVANCED MICRO DEVICES, INC. (Santa Clara, CA, US) |
| Claim: | 1. A method of selecting an error correction code type for a memory device, the method comprising: selecting, by the memory device based on predefined selection criteria, one of a plurality of error correction code types, the memory device configured to store error correction code (ECC) encoded data; and executing memory access requests utilizing the selected error correction code type. |
| Claim: | 2. The method of claim 1 , wherein selecting one of the plurality of error correction code types based on predefined selection criteria further comprises: selecting one of the plurality of error correction code types based on a type of a connection coupling between the memory device and a host. |
| Claim: | 3. The method of claim 2 , further comprising: responsive to detecting a different connection to a host, reselecting one of the plurality of error correction code types. |
| Claim: | 4. The method of claim 1 , wherein selecting one of the plurality of error correction code types based on predefined selection criteria further comprises: selecting one of the plurality of error correction code types based on a level at which the memory device is assigned within a memory hierarchy. |
| Claim: | 5. The method of claim 1 , wherein selecting one of the plurality of error correction code types based on predefined selection criteria further comprises: selecting one of the plurality of error correction code types based on access patterns of data stored on the memory device. |
| Claim: | 6. The method of claim 1 , wherein selecting one of the plurality of error correction code types based on predefined selection criteria further comprises: selecting one of the plurality of error correction code types based on a communications distance between the memory device and a host, wherein the communications distance refers to a length of a data communications link coupling the memory device and the host. |
| Claim: | 7. The method of claim 1 , wherein selecting one of the plurality of error correction code types based on predefined selection criteria further comprises: selecting one of the plurality of error correction code types during initialization of the memory device. |
| Claim: | 8. The method of claim 1 further comprising: receiving, from a host of a system, location information of the memory device within the system without request from the memory device, wherein selecting one of the plurality of error correction code types further comprises selecting one of the plurality of error correction code types based on the received location information. |
| Claim: | 9. The method of claim 1 further comprising: querying, by the memory device, a host of a system for location information of the memory device; and receiving, from the host, the location information, wherein selecting one of the plurality of error correction code types further comprises selecting one of the plurality of error correction code types in dependence upon the received location information. |
| Claim: | 10. The method of claim 1 , wherein each of the plurality of error correcting code types comprises a different code-rate. |
| Claim: | 11. A memory device for selecting an error correction code type, the memory device comprising: a memory including a plurality of error correction code types; and error correction selection logic configured to: select, based on predefined selection criteria, one of a plurality of error correction code types, the memory device configured to store error correction code (ECC) encoded data, and execute memory access requests utilizing the selected error correction code type. |
| Claim: | 12. The memory device of claim 11 , wherein the error correction selection logic is further configured to carry out selecting one of the plurality of error correction code types based on predefined selection criteria by selecting one of the plurality of error correction code types based on a type of a connection coupling between the memory device and a host. |
| Claim: | 13. The memory device of claim 12 , wherein the error correction selection logic is further configured to reselect one of the plurality of error correction code types responsive to detecting a different connection to a host. |
| Claim: | 14. The memory device of claim 11 , wherein the error correction selection logic is further configured to select one of the plurality of error correction code types by selecting one of the plurality of error correction code types based on a level at which the memory device is assigned within a memory hierarchy. |
| Claim: | 15. The memory device of claim 11 , wherein the error correction selection logic is further configured to select one of the plurality of error correction code types based on predefined selection criteria by selecting one of the plurality of error correction code types based on access patterns of data stored on the memory device. |
| Claim: | 16. The memory device of claim 11 , wherein the error correction selection logic is further configured to select one of the plurality of error correction code types based on predefined selection criteria by selecting one of the plurality of error correction code types based on a communications distance between the memory device and a host, wherein the communications distance refers to a length of a data communications link coupling the memory device and the host. |
| Claim: | 17. The memory device of claim 11 , wherein the error correction selection logic is further configured to select one of the plurality of error correction code types based on predefined selection criteria by selecting one of the plurality of error correction code types during initialization of the memory device. |
| Claim: | 18. The memory device of claim 11 wherein the error correction selection logic is further configured to: receive, from a host of a system, location information of the memory device within the system without request from the memory device, wherein selecting one of the plurality of error correction code types further comprises selecting one of the plurality of error correction code types based on the received location information. |
| Claim: | 19. The memory device of claim 11 , wherein the error correction selection logic is further configured to: query a host of a system for location information of the memory device; and receive, from the host, the location information, wherein selecting one of the plurality of error correction code types further comprises selecting one of the plurality of error correction code types based on the received location information. |
| Claim: | 20. The memory device of claim 11 , wherein each of the plurality of error correcting code types comprises a different code-rate. |
| Claim: | 21. A method of selecting an error correction code type, the method comprising: determining, by a host of a system, a type of connection coupling a memory device to the host, wherein the memory device comprises a plurality of error correction code types; selecting, by the host, one of the plurality of error correction code types based on the connection type; and informing, by the host, the memory device of the selected error correction code type. |
| Claim: | 22. The method of claim 21 , wherein upon receiving the error correction code type selected by the host, the memory device is configured to execute memory access requests utilizing the selected error correction code. |
| Claim: | 23. A method of selecting an error correction code type, the method comprising: determining, by a host of a system, a layer of a memory device within a memory hiearchy of the system's memory hierarchy, wherein the memory device comprises a plurality of error correction code types; selecting, by the host, one of the plurality of error correction code types based on the layer of the memory device within the system's memory hierarchy; and informing, by the host, the memory device of the selected error correction code type. |
| Claim: | 24. The method of claim 23 , wherein upon receiving the error correction code type selected by the host, the memory device is configured to execute memory access requests utilizing the selected error correction code. |
| Claim: | 25. A method of selecting an error correction code type, the method comprising: determining, by a host of a system, a communications distance of a coupling of a memory device to the host, wherein the memory device comprises a plurality of error correction code types; selecting, by the host, one of a plurality of error correction code types based on the communications distance of the coupling of the memory device to the host, wherein the communications distance refers to a length of a data communications link coupling the memory device and the host; and informing, by the host, the memory device of the selected error correction code type. |
| Claim: | 26. The method of claim 25 , wherein upon receiving the error correction code type selected by the host, the memory device is configured to execute memory access requests utilizing the selected error correction code. |
| Patent References Cited: | 10157096 December 2018 Cai 20130073895 March 2013 Cohen 20160301427 October 2016 Sprouse 20200127685 April 2020 Chen 20200201698 June 2020 Gans 2006013529 February 2006 |
| Other References: | Zhang et al., Exploring and Optimizing Chipkill-Correct for Persistent Memory based on High-Density NVRAMs, 51st Annual IEEE/ACM International Symposium on Microarchitecture (MICRO 2018), Oct. 2018, pp. 711-724, IEEE Computer Society, Los Alamitos, CA. cited by applicant Yoon et al., Virtualized and Flexible ECC for Main Memory, Proceedings of the Fifteenth Edition of ASPLOS on Architectural Support for Programming Languages and Operating Systems, Mar. 2010, pp. 397-408, ACM New York, NY. cited by applicant International Search Report and Written Opinion, PCT/US2020/052481, dated Feb. 8, 2021, 15 pages. cited by applicant |
| Primary Examiner: | Tu, Christine T. |
| Prístupové číslo: | edspgr.11880277 |
| Databáza: | USPTO Patent Grants |
| Abstrakt: | Selecting an error correction code type for a memory device includes: selecting, by the memory device in dependence upon predefined selection criteria, one of a plurality of error correction code types and carrying out memory access requests utilizing the selected error correction code type. |
|---|