Thread serialization, distributed parallel programming, and runtime extensions of parallel computing platform
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| Název: | Thread serialization, distributed parallel programming, and runtime extensions of parallel computing platform |
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| Patent Number: | 10719,902 |
| Datum vydání: | July 21, 2020 |
| Appl. No: | 15/488842 |
| Application Filed: | April 17, 2017 |
| Abstrakt: | Systems, apparatuses, and methods may provide for technology to process graphical data, and to modify a runtime environment in a parallel computing platform for a graphic environment. |
| Inventors: | Intel Corporation (Santa Clara, CA, US) |
| Assignees: | Intel Corporation (Santa Clara, CA, US) |
| Claim: | 1. A graphics processing system, comprising: a display to visually present a rendering graphical image; a memory to store a set of instructions; and a semiconductor package apparatus operatively coupled to the memory and the display, the semiconductor package apparatus including: a substrate, a host processor operatively coupled to the memory and the substrate, wherein when executed by the host processor, the set of instructions cause the host processor to execute a multi-threaded graphics platform, and a host graphics processor operatively coupled to the substrate, wherein the host graphics processor includes logic to: detect, in parallel to executing a plurality of threads of the multi-threaded graphics platform, a presence of one or more remote graphics processors on a shared computer network, by dynamically detecting a spatial proximity of the one or more remote graphics processors relative to the host graphics processor; dynamically enable, in response to detecting the presence, one or more of the detected remote graphics processors to conduct parallel runtime execution of a portion of the threads based on the detected spatial proximity. |
| Claim: | 2. The graphics processing system of claim 1 , wherein enabling the one or more detected remote graphics processors comprises dynamically distributing, via the shared computer network, a portion of the plurality of threads to the one or more enabled remote graphics processors for the parallel runtime execution thereof. |
| Claim: | 3. The graphics processing system of claim 1 , wherein enabling the one or more detected remote graphics processors comprises permitting the one or more enabled remote graphics processors access, via the shared computer network, to the portion of the plurality of threads for the parallel runtime execution thereof. |
| Claim: | 4. The graphics processing system of claim 1 , wherein the host graphics processor includes logic to: receive, via the shared computer network, computational work from the one or more enabled remote graphics processors; and aggregate, in response to receiving the computational work from the one or more enabled remote graphics processors, computational work performed by the host graphics processor and the computational work performed by the one or more enabled remote graphics processors to produce a rendered graphical image. |
| Claim: | 5. The graphics processing system of claim 1 , wherein the logic is to dynamically remove the one or more enabled remote graphics processors from the parallel runtime execution of the portion of the threads by dynamically disabling the parallel runtime execution of the portion of the threads by the one or more enabled remote graphics processors. |
| Claim: | 6. The graphics processing system of claim 1 , wherein detecting the presence of one or more remote graphics processors comprises transmitting, to the host processor, a signal representing a spatial proximity value. |
| Claim: | 7. The graphics processing system of claim 6 , wherein the host processor, upon receipt of the transmitted signal, is to compare the detected spatial proximity value with a predetermined threshold spatial proximity value. |
| Claim: | 8. The graphics processing system of claim 7 , wherein the host processor is to enable the one or more remote graphics processors to conduct the parallel runtime execution of the portion of the threads when the detected spatial proximity value is less than the predetermined threshold spatial proximity value. |
| Claim: | 9. A semiconductor package apparatus, comprising: a substrate; logic coupled to the substrate, wherein the logic is at least partially implemented in one or more of configurable logic or fixed-functionality hardware logic, the logic to: detect, in parallel to executing a plurality of threads of a multi-threaded graphics platform, a presence of one or more remote graphics processors on a shared computer network, by dynamically detecting a spatial proximity of the one or more remote graphics processors relative to a host graphics processor; and enable, in response to detecting the presence, one or more of the detected remote graphics processors to conduct parallel runtime execution of a portion of the threads based on the detected spatial proximity. |
| Claim: | 10. The semiconductor package apparatus of claim 9 , wherein enabling the one or more detected remote graphics processors comprises dynamically distributing, via the shared computer network, the portion of the plurality of threads to the one or more enabled remote graphics processors for the parallel runtime execution thereof. |
| Claim: | 11. The semiconductor package apparatus of claim 9 , wherein enabling the one or more detected remote graphics processors comprises permitting the one or more enabled remote graphics processors access, via the shared computer network, to the portion of the plurality of threads for the parallel runtime execution thereof. |
| Claim: | 12. The semiconductor package apparatus of claim 9 , wherein the logic is to: receive, via the shared computer network, computational work from the one or more enabled remote graphics processors; and aggregate, in response to receiving the computational work from the one or more enabled remote graphics processors, computational work performed by the host graphics processor and the computational work performed by the one or more enabled remote graphics processors to produce a rendered graphical image. |
| Claim: | 13. The semiconductor package apparatus of claim 9 , wherein the logic is to remove the one or more enabled remote graphics processors from the parallel runtime execution of the portion of the threads by disabling the parallel runtime execution of the portion of the threads by the one or more enabled remote graphics processors. |
| Claim: | 14. A method of processing a graphical image, comprising: detecting, in parallel to executing a plurality of threads of a multi-threaded graphics platform, a presence of one or more remote graphics processors on a shared computer network, wherein the detecting includes dynamically detecting a spatial proximity of the one or more remote graphics processors relative to a host graphics processor; and enabling, in response to detecting the presence, one or more of the detected remote graphics processors to conduct parallel runtime execution of a portion of the threads based on the detected spatial proximity. |
| Claim: | 15. The method of claim 14 , wherein enabling the one or more detected remote graphics processors comprises dynamically distributing, via the shared computer network, the portion of the plurality of threads to the one or more enabled remote graphics processors for the parallel runtime execution thereof. |
| Claim: | 16. The method of claim 15 , wherein enabling the one or more detected remote graphics processors comprises permitting the one or more enabled remote graphics processors access, via the shared computer network, to the portion of the plurality of threads for the parallel runtime execution thereof. |
| Claim: | 17. The method of claim 15 , further comprising: receiving, via the shared computer network, computational work from the one or more enabled remote graphics processors; and aggregating, in response to receiving the computational work from the one or more enabled remote graphics processors, computational work performed by the host graphics processor and the computational work performed by the one or more enabled remote graphics processors to produce a rendered graphical image. |
| Claim: | 18. The method of claim 15 , further comprising removing the one or more enabled remote graphics processors from the parallel runtime execution of the portion of the threads by dynamically disabling the parallel runtime execution of the portion of the threads by the one or more enabled remote graphics processors. |
| Claim: | 19. At least one non-transitory computer readable medium, comprising a set of instructions, which when executed by a host graphics processor, cause the host graphics processor to: detect, in parallel to executing a plurality of threads of a multi-threaded graphics platform, a presence of one or more remote graphics processors on a shared computer network, by dynamically detecting a spatial proximity of the one or more remote graphics processors relative to the host graphics processor; enable, in response to detecting the presence, one or more of the detected remote graphics processors to conduct parallel runtime execution of a portion of the threads based on the detected spatial proximity. |
| Claim: | 20. The at least one non-transitory computer readable medium of claim 19 , wherein enabling the one or more detected remote graphics processors comprises dynamically distributing, via the shared computer network, a portion of the plurality of threads to the one or more enabled remote graphics processors for the parallel runtime execution thereof. |
| Claim: | 21. The at least one non-transitory computer readable medium of claim 19 , wherein enabling the one or more detected remote graphics processors comprises permitting the one or more enabled remote graphics processors access, via the shared computer network, to the portion of the plurality of threads for the parallel runtime execution thereof. |
| Claim: | 22. The at least one non-transitory computer readable medium of claim 19 , wherein the host graphics processor includes logic to: receive, via the shared computer network, computational work from the one or more enabled remote graphics processors; and aggregate, in response to receiving the computational work from the one or more enabled remote graphics processors, computational work performed by the host graphics processor and the computational work performed by the one or more enabled remote graphics processors to produce a rendered graphical image. |
| Claim: | 23. The at least one non-transitory computer readable medium of claim 19 , wherein the host graphics processor is to remove one or more of the enabled remote graphics processors from the parallel runtime execution of the portion of the threads by dynamically disabling the parallel runtime execution of the portion of the threads by the one or more enabled remote graphics processors. |
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| Other References: | Nicholas Wilt, “The CUDA Handbook: A Comprehensive Guide to GPU Programming”, 522 pages, Jun. 2013, Addison-Wesley, USA. cited by applicant Shane Cook, “CUDA Programming: A Developer's Guide to Parallel Computing with GPUs”, 591 pages, 2013, Elsevier, USA. cited by applicant European Search Report for EP Patent Application No. 18167860.8, dated Sep. 12, 2018, 8 pages. cited by applicant |
| Primary Examiner: | Nguyen, Phong X |
| Attorney, Agent or Firm: | Jordan IP Law, LLC |
| Přístupové číslo: | edspgr.10719902 |
| Databáze: | USPTO Patent Grants |
| Abstrakt: | Systems, apparatuses, and methods may provide for technology to process graphical data, and to modify a runtime environment in a parallel computing platform for a graphic environment. |
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