Extraction of a binary code based on physical parameters of an integrated circuit via programming resistors
Gespeichert in:
| Titel: | Extraction of a binary code based on physical parameters of an integrated circuit via programming resistors |
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| Patent Number: | 7,978,540 |
| Publikationsdatum: | July 12, 2011 |
| Appl. No: | 12/641789 |
| Application Filed: | December 18, 2009 |
| Abstract: | An integrated cell and method for extracting a binary value based on a value difference between two resistors values, including connection circuitry for a binary reading of the sign of the difference between the resistors, and connection circuitry for a modification of the value of one of the resistors to make the sign of the difference invariable. |
| Inventors: | Bardouillet, Michel (Aix en Provence, FR); Rizzo, Pierre (Aix en Provence, FR); Malherbe, Alexandre (Trets, FR); Wuidart, Luc (Pourrieres, FR) |
| Assignees: | STMicroelectronics S.A. (Montrouge, FR) |
| Claim: | 1. A method for programming a memory cell to store a binary value, the memory cell comprising first and second resistors, the method comprising: reading a sign of a difference between values of the first and second resistors; and decreasing a value of the first resistor or the second resistor to make the sign of the difference invariable. |
| Claim: | 2. The method of claim 1 , further comprising reading, as the binary value, said sign of the difference between the values of the first and second resistors. |
| Claim: | 3. The method of claim 1 , wherein the decreasing of said value comprises decreasing, in an irreversible and stable manner, within a read operating current range of the memory cell, the value of one of said first and second resistors. |
| Claim: | 4. The method of claim 1 , wherein the decreasing of the value is caused by temporarily applying a programming current to a selected resistor of the first and second resistors, the programming current being greater than a current for which the value of the selected resistor is a maximum. |
| Claim: | 5. The method of claim 1 , further comprising: prior to decreasing the value, selecting one of the first and second resistors to be a selected resistor based on the sign of the difference. |
| Claim: | 6. The method of claim 5 , wherein the decreasing of said value comprises: increasing step-by-step the current in the selected resistor; and measuring the value of the selected resistor as the current in the selected resistor is increased. |
| Claim: | 7. The method of claim 5 , wherein the decreasing of said value comprises: determining a programming current using a predetermined table of correspondence between resistor stabilization current and a desired final resistance and supplying the programming current to the selected resistor. |
| Claim: | 8. The method of claim 1 , wherein the first and second resistors are manufactured to be substantially identical. |
| Claim: | 9. An integrated memory cell for extracting a binary value based on a difference between two resistor values, comprising: a first circuit configured to read a sign of the difference between said two resistor values; and a second circuit configured to decrease a value of one of said resistors to make said sign of the difference invariable. |
| Claim: | 10. The cell of claim 9 , wherein the first circuit is configured to read the sign of the difference as a binary value. |
| Claim: | 11. The cell of claim 9 , wherein the decreasing of said value comprises decreasing, in an irreversible and stable manner, within the read operating current range of the cell, the value of one of said resistors. |
| Claim: | 12. The cell of claim 11 , wherein the value decrease is caused by temporarily applying, in the corresponding resistor, a current which is greater than the current for which the value of the resistor is maximum. |
| Claim: | 13. The cell of claim 9 , wherein the resistors are made of polysilicon and are sized to have identical nominal values. |
| Claim: | 14. The cell of claim 9 , applied to the extraction of the binary value based on a propagation of an edge of a triggering signal in two electric paths, comprising, between two voltage supply terminals, two parallel branches each comprising, in series: one of said resistors for differentiating the electric paths; a read transistor, the junction point of the resistor and the read transistor of each branch defining an output terminal of the cell, and the gate of the read transistor of each branch being connected to the output terminal of the other branch; and a selection transistor. |
| Claim: | 15. The cell of claim 14 , wherein each branch further comprises a stabilization transistor connecting its output terminal to said terminal of application of a voltage opposite to that to which the resistor of the involved branch is connected. |
| Claim: | 16. The cell of claim 15 , wherein the decreasing of said value comprises decreasing, in an irreversible and stable manner, within the read operating current range of the cell, the value of one of said resistors, and wherein the stabilization transistors are used to cause said decrease in the value of one of the resistors. |
| Claim: | 17. The cell of claim 14 , wherein said voltage supply is chosen from a relatively low read voltage and a relatively high voltage of stabilization of the initial cell state. |
| Claim: | 18. The cell of claim 9 , comprising: two parallel branches each comprising one of said resistors connected between a first supply terminal and a terminal for differentially reading the cell state; and at least one programming switch connecting one of said read terminals to a second terminal of application of the supply voltage. |
| Claim: | 19. The cell of claim 18 , wherein each branch comprises a programming switch. |
| Current U.S. Class: | 36518/915 |
| Patent References Cited: | 3636530 January 1972 Mark et al. 5708291 January 1998 Bohr et al. 5818738 October 1998 Effing 5969404 October 1999 Bohr et al. 6115283 September 2000 Hidaka 6161213 December 2000 Lofstrom 6258700 July 2001 Bohr et al. 6297083 October 2001 Klein 6337507 January 2002 Bohr et al. 6400632 June 2002 Tanizaki et al. 6469923 October 2002 Hidaka 6757832 June 2004 Silverbrook et al. 6836430 December 2004 Wuidart et al. 7036005 April 2006 Nalawadi et al. 7333386 February 2008 Bardouillet et al. 7660182 February 2010 Bardouillet et al. 2002/0060941 May 2002 Casper et al. 2003/0046480 March 2003 Rzittka 2003/0056122 March 2003 Wuidart 2003/0151539 August 2003 Wuidart et al. 2005/0162892 July 2005 Bardouillet et al. 2005/0173779 August 2005 Wuidart et al. 0 511 560 November 1992 0863546 September 1998 2 000 407 January 1979 2-42760 February 1990 04-155696 May 1992 05-101687 April 1993 10-208491 August 1998 10340663 December 1998 11-162172 June 1999 2000-182393 June 2000 2001-118996 April 2001 |
| Other References: | French Search Report from the French priority application No. 02/13556, filed Oct. 29, 2002. cited by other |
| Primary Examiner: | Tran, Andrew Q |
| Attorney, Agent or Firm: | Jorgenson, Lisa K. Morris, James H. Wolf, Greenfield & Sacks, P.C. |
| Dokumentencode: | edspgr.07978540 |
| Datenbank: | USPTO Patent Grants |
| Abstract: | An integrated cell and method for extracting a binary value based on a value difference between two resistors values, including connection circuitry for a binary reading of the sign of the difference between the resistors, and connection circuitry for a modification of the value of one of the resistors to make the sign of the difference invariable. |
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