Reduced complexity and increased flexibility modified fast convolution algorithm
Gespeichert in:
| Titel: | Reduced complexity and increased flexibility modified fast convolution algorithm |
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| Patent Number: | 6,247,035 |
| Publikationsdatum: | June 12, 2001 |
| Appl. No: | 09/163,298 |
| Application Filed: | September 30, 1998 |
| Abstract: | A modified fast convolution algorithm may be enhanced in order to increase the flexibility of the algorithm. In an exemplary embodiment of the present invention, a folding unit is introduced as a pre-processing stage prior to the Inverse Discrete Fourier Transform (IDFT) in the receiver. The folding unit adds outer frequency components onto inner frequency components in the frequency domain in order to produce a reduced set of frequency components. In an alternative embodiment, an unfolding unit is introduced as a post-processing stage after the Discrete Fourier Transform (DFT) in the transmitter. The unfolding unit expands the set of the set of frequency components by adding translated original components outside the original set. The folding and unfolding processes increase the flexibility of the modified fast convolution algorithm by reducing the number of operations per second that have to be performed for the channel-specific parts of the algorithm. Moreover, since the number of operations per channel decreases, more channels can be treated by a single chip. |
| Inventors: | Hellberg, Richard (Huddinge, SEX) |
| Assignees: | Telefonaktiebolaget LM Ericsson (publ) (Stockholm, SEX) |
| Claim: | What is claimed is |
| Claim: | 1. A system for enhancing a modified fast convolution algorithm applied to a channelizer, said system comprising |
| Claim: | a .eta. % overlap block generator for converting a received data stream into blocks; |
| Claim: | means for performing a N.sub.DFT -point Discrete Fourier Transform (DFT) on said blocks to form frequency components; |
| Claim: | means for selecting frequency components; |
| Claim: | a multiplier for multiplying said selected frequency components with frequency filter coefficients; |
| Claim: | means for folding said multiplied frequency components into a smaller number of frequency components; |
| Claim: | means for performing a N.sub.IDFT -point Inverse Discrete Fourier Transform (IDFT) on said folded frequency components; and |
| Claim: | a .eta. % overlap block combiner. |
| Claim: | 2. The system of claim 1 wherein the means for folding adds outer frequency components to inner frequency components in order to produce said smaller number of components. |
| Claim: | 3. The system of claim 2, wherein said means for folding comprises |
| Claim: | means for adding a first number of the outer frequency components to a first number of the inner frequency components; and |
| Claim: | means for adding a second number of the outer frequency components to a second number of the inner frequency components, wherein the addition of the first number of outer frequency components to the first number of inner frequency components and the addition of the second number of outer frequency components to the second number of inner frequency components are symmetric processes. |
| Claim: | 4. The system of claim 2, wherein said means for folding comprises |
| Claim: | means for adding a second number of the outer frequency components to a second number of the inner frequency components, wherein each of the frequency components corresponding to the first number of outer frequency components are higher in frequency than each of the frequency components corresponding to the second number of outer frequency components, and wherein each of the frequency components corresponding to the first number of inner frequency components are lower in frequency than each of the frequency components corresponding to the second number of inner frequency components. |
| Claim: | 5. The system of claim 1 wherein said means for folding is located between said multiplier and said means for performing a N.sub.IDFT -point Inverse Discrete Fourier Transform. |
| Claim: | 6. The system of claim 1 wherein said means for folding performs a higher order folding where three or more frequency components are added together to form one input component to the IDFT. |
| Claim: | 7. A method for enhancing a modified fast convolution algorithm applied to a channelizer, said method comprising the steps of |
| Claim: | processing blocks of data with a N.sub.DFT -point Discrete Fourier Transform (DFT) to form frequency components; |
| Claim: | multiplying selected frequency components with frequency filter components; |
| Claim: | folding the multiplied frequency components into a smaller number of frequency components; |
| Claim: | performing a N.sub.IDFT -point Inverse Discrete Fourier Transform (IDFT) on the folded frequency components to form filtered data blocks; and |
| Claim: | combining said filtered data blocks into a continuous data stream. |
| Claim: | 8. The method of claim 7 wherein the folding step comprises the step of |
| Claim: | adding outer frequency components to inner frequency components in order to produce said smaller number of components. |
| Claim: | 9. The method of claim 8, wherein said step of folding the multiplied frequency components into a smaller number of frequency components comprises the steps of |
| Claim: | adding a first number of the outer frequency components to a first number of the inner frequency components; and |
| Claim: | adding a second number of the outer frequency components to a second number of the inner frequency components, wherein the addition of the first number of outer frequency components to the first number of inner frequency components and the addition of the second number of outer frequency components to the second number of inner frequency components are symmetric processes. |
| Claim: | 10. The method of claim 8, wherein said step of folding the multiplied frequency components into a smaller number of frequency components comprises the steps of |
| Claim: | adding a second number of the outer frequency components to a second number of the inner frequency components, wherein each of the frequency components corresponding to the first number of outer frequency components are higher in frequency than each of the frequency components corresponding to the second number of outer frequency components, and wherein each of the frequency components corresponding to the first number of inner frequency components are lower in frequency than each of the frequency components corresponding to the second number of inner frequency components. |
| Claim: | 11. The method of claim 7 wherein said step of folding is a higher order folding step where three or more frequency components are added together to form one input component to the IDFT. |
| Claim: | 12. A system for enhancing a modified fast convolution algorithm applied to a de-channelizer, said system comprising |
| Claim: | a .eta. % overlap block generator for converting a data stream into blocks; |
| Claim: | means for performing a N.sub.DFT -point Discrete Fourier Transform on said blocks to form an original set of frequency components; |
| Claim: | means for unfolding the original set of frequency components to form a larger number of frequency components; |
| Claim: | a multiplier for multiplying said larger number of frequency components with frequency filter coefficients; |
| Claim: | means for inserting the multiplied frequency components into a N.sub.IDFT -point Inverse Discrete Fourier Transform; |
| Claim: | means for performing the N.sub.IDFT -point Inverse Discrete Fourier Transform; and |
| Claim: | 13. The system of claim 12 wherein said means for unfolding expands a smaller number of frequency components into a larger number of frequency components by adding original components outside the original set. |
| Claim: | 14. The system of claim 13 wherein said means for unfolding performs a higher order unfolding where larger number is more than twice the smaller number. |
| Claim: | 15. The system of claim 13, wherein said means for unfolding comprises |
| Claim: | means for adding a first number of outer frequency components, wherein the one outer frequency component, associated with the first number of outer frequency components, having the lowest frequency is greater in frequency than any of the original set of frequency components; and |
| Claim: | means for adding a second number of outer frequency components, wherein the one outer frequency component, associated with the second number of outer frequency components, having the highest frequency is lower in frequency than any of the original set of frequency components. |
| Claim: | 16. The system of claim 15, wherein the first number of outer frequency components and the second number of outer frequency components are equal. |
| Claim: | 17. A method for enhancing a modified fast convolution algorithm applied to a de-channelizer, said method comprising the steps of |
| Claim: | performing a N.sub.DFT -point Discrete Fourier Transform on overlapping blocks of data to produce an original set of frequency components; |
| Claim: | unfolding said original set of frequency components in order to form a larger number of frequency components; |
| Claim: | multiplying said larger number of frequency components with frequency filter coefficients; |
| Claim: | performing a N.sub.IDFT -point Inverse Discrete Fourier Transform on the multiplied frequency components to obtain data blocks; and |
| Claim: | combining said data blocks into a continuous data stream. |
| Claim: | 18. The method of claim 17 wherein the step of unfolding expands a smaller number of frequency components into a larger number of frequency components by adding original components outside the original set. |
| Claim: | 19. The method of claim 18 wherein the step of unfolding is a higher order unfolding where said larger number is more than twice the smaller number. |
| Claim: | 20. The method of claim 18, wherein said step of unfolding said original set of frequency components in order to form a larger number of frequency components comprises the steps of |
| Claim: | adding a first number of outer frequency components, wherein the one outer frequency component, associated with the first number of outer frequency components, having the lowest frequency is greater in frequency than any of the original set of frequency components; and |
| Claim: | adding a second number of outer frequency components, wherein the one outer frequency component, associated with the second number of outer frequency components, having the highest frequency is lower in frequency than any of the original set of frequency components. |
| Claim: | 21. The method of claim 20, wherein the first number of outer frequency components and the second number of outer frequency components are equal. |
| Current U.S. Class: | 708/420; 708/405 |
| Current International Class: | G06F 1715; G06F 1714 |
| Patent References Cited: | 4636922 January 1987 Boland 5270953 December 1993 White 5485395 January 1996 Smith 5535240 July 1996 Carney et al. 5583792 December 1996 Li et al. 5794046 August 1998 Hayashi 5890106 March 1999 Bosi-Goldberg 5930231 July 1999 Miller et al. |
| Other References: | "Distortion Analysis of the Bulk FFT Structure for Multi-Carrier Demodulators", Y.O. Al-Jalili, S.K. Barton and S.J. Shepherd, Signal Processing, vol. 42, 1995, pp. 215-219. "A Flexible On-Board Demultiuplexer/Demodulator", S. Joseph Campanella and Soheil Sayegh, 1988, pp. 299-303. "Simulation and Analysis of the Distortion Generated by the Bulk-FFT Demultiplexer", S.K. Barton, I.R. Johnson, S.J. Shepherd and P.W.J. van Eetvelt, Signal Processing, vol. 54, 1996, pp. 285-294. R.E. Crochiere, et al., "Multirate Digital Signal Processing", Prentice-Hall, Englewood Cliffs, XP002104475, Section 7.4, 1983, pps. 346-356. |
| Primary Examiner: | Mai, Tan V. |
| Attorney, Agent or Firm: | Burns, Doane, Swecker & Mathis, L.L.P. |
| Dokumentencode: | edspgr.06247035 |
| Datenbank: | USPTO Patent Grants |
| Abstract: | A modified fast convolution algorithm may be enhanced in order to increase the flexibility of the algorithm. In an exemplary embodiment of the present invention, a folding unit is introduced as a pre-processing stage prior to the Inverse Discrete Fourier Transform (IDFT) in the receiver. The folding unit adds outer frequency components onto inner frequency components in the frequency domain in order to produce a reduced set of frequency components. In an alternative embodiment, an unfolding unit is introduced as a post-processing stage after the Discrete Fourier Transform (DFT) in the transmitter. The unfolding unit expands the set of the set of frequency components by adding translated original components outside the original set. The folding and unfolding processes increase the flexibility of the modified fast convolution algorithm by reducing the number of operations per second that have to be performed for the channel-specific parts of the algorithm. Moreover, since the number of operations per channel decreases, more channels can be treated by a single chip. |
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