JAIP-MP: A Four-Core Java Application Processor for Embedded Systems
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| Title: | JAIP-MP: A Four-Core Java Application Processor for Embedded Systems |
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| Authors: | Tsai, Chun-Jen, Wu, Tsung-Han, Su, Hung-Cheng, Chen, Cheng-Yang |
| Contributors: | Department of Computer Science & Information Engineering Hsinchu (CSIE), National Chiao Tung University (NCTU), TC 10, WG 10.5 |
| Source: | IFIP Advances in Information and Communication Technology ; 23th IFIP/IEEE International Conference on Very Large Scale Integration - System on a Chip (VLSI-SoC) ; https://inria.hal.science/hal-01578615 ; 23th IFIP/IEEE International Conference on Very Large Scale Integration - System on a Chip (VLSI-SoC), Oct 2015, Daejeon, South Korea. pp.170-192, ⟨10.1007/978-3-319-46097-0_9⟩ |
| Publisher Information: | CCSD |
| Publication Year: | 2015 |
| Subject Terms: | Java processors, Multi-core processors, Embedded SoC, Hardwired operating system kernel, [INFO]Computer Science [cs] |
| Subject Geographic: | Daejeon, South Korea |
| Description: | International audience ; In this chapter, we present a four-core Java application processor, JAIP-MP. In addition to supporting multi-core coherent data accesses to shared memory, each processor core in JAIP-MP is a hardwired Java core that is capable of dynamic class loading, two-fold bytecode execution, object-oriented dynamic resolution, method/object caching, Java exception handling, preemptive multithreading, and memory management. Most of the essential OS kernel functions are implemented in hardware. In particular, the preemptive multi-threading performance is much higher than that of a software-based VM running on a traditional OS kernel such as Linux. Currently, single-cycle context switching with a time quantum as small as 20 μs can be achieved by each core. More importantly, the Java language model itself makes it possible to maintain binary portability of application software regardless of the hardwired OS kernel component. In summary, JAIP-MP could be used to study the potential benefits of OS kernel implementation in hardware. |
| Document Type: | conference object |
| Language: | English |
| DOI: | 10.1007/978-3-319-46097-0_9 |
| Availability: | https://inria.hal.science/hal-01578615 https://inria.hal.science/hal-01578615v1/document https://inria.hal.science/hal-01578615v1/file/431455_1_En_9_Chapter.pdf https://doi.org/10.1007/978-3-319-46097-0_9 |
| Rights: | http://creativecommons.org/licenses/by/ ; info:eu-repo/semantics/OpenAccess |
| Accession Number: | edsbas.F515C421 |
| Database: | BASE |
Nájsť tento článok vo Web of Science | Abstract: | International audience ; In this chapter, we present a four-core Java application processor, JAIP-MP. In addition to supporting multi-core coherent data accesses to shared memory, each processor core in JAIP-MP is a hardwired Java core that is capable of dynamic class loading, two-fold bytecode execution, object-oriented dynamic resolution, method/object caching, Java exception handling, preemptive multithreading, and memory management. Most of the essential OS kernel functions are implemented in hardware. In particular, the preemptive multi-threading performance is much higher than that of a software-based VM running on a traditional OS kernel such as Linux. Currently, single-cycle context switching with a time quantum as small as 20 μs can be achieved by each core. More importantly, the Java language model itself makes it possible to maintain binary portability of application software regardless of the hardwired OS kernel component. In summary, JAIP-MP could be used to study the potential benefits of OS kernel implementation in hardware. |
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| DOI: | 10.1007/978-3-319-46097-0_9 |