Real-Time Wait-Free Queues using Micro-Transactions
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| Title: | Real-Time Wait-Free Queues using Micro-Transactions |
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| Authors: | Fadi Meawad, Martin Schoeberl, Karthik Iyer |
| Contributors: | The Pennsylvania State University CiteSeerX Archives |
| Source: | http://www.jopdesign.com/doc/utran.pdf. |
| Collection: | CiteSeerX |
| Subject Terms: | Memory, Optimizations, Real-time, Java Processor Keywords Transactional Memory, CAS, MCAS, Wait-Free queue |
| Description: | This paper evaluates the applicability of transactional memory to the implementation of different non-blocking data structures in the context of the Real-time Specification for Java. In particular, we argue that hardware support for micro-transaction allows us to implement efficiently data structures that are often difficult to realize with the atomic operations provided by stock hardware. Our main implementation platform is the Java Optimized Processor system. We report on the performance of data structures implemented with locks, compare and swap and micro-transactions. Our results confirm that transactional memory is an interesting alternative to traditional concurrency control mechanisms. |
| Document Type: | text |
| File Description: | application/pdf |
| Language: | English |
| Relation: | http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.228.5672; http://www.jopdesign.com/doc/utran.pdf |
| Availability: | http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.228.5672 http://www.jopdesign.com/doc/utran.pdf |
| Rights: | Metadata may be used without restrictions as long as the oai identifier remains attached to it. |
| Accession Number: | edsbas.4B107B4 |
| Database: | BASE |
| Abstract: | This paper evaluates the applicability of transactional memory to the implementation of different non-blocking data structures in the context of the Real-time Specification for Java. In particular, we argue that hardware support for micro-transaction allows us to implement efficiently data structures that are often difficult to realize with the atomic operations provided by stock hardware. Our main implementation platform is the Java Optimized Processor system. We report on the performance of data structures implemented with locks, compare and swap and micro-transactions. Our results confirm that transactional memory is an interesting alternative to traditional concurrency control mechanisms. |
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