Microarchitectural simulator for shader cores in a modern GPU simulation infrastructure

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Bibliographic Details
Title: Microarchitectural simulator for shader cores in a modern GPU simulation infrastructure
Authors: Joseph, Diya
Contributors: Universitat Politècnica de Catalunya. Departament d'Arquitectura de Computadors, González Colás, Antonio María, Anglada Sánchez, Martí
Publisher Information: Universitat Politècnica de Catalunya
Publication Year: 2019
Collection: Universitat Politècnica de Catalunya, BarcelonaTech: UPCommons - Global access to UPC knowledge
Subject Terms: Àrees temàtiques de la UPC::Informàtica, Mobile apps, microarquitectura, GPU, gràfics de baix consum, càrregues de treball en gràfics, jocs mòbils, GPU mòbil, infraestructura de simulació, processadors de shaders, microarchitecture, Graphics Processing Units, low power graphics, graphics workloads, mobile games, Mobile GPU, simulation infrastructure, shader core, Aplicacions mòbils
Description: The objective of this project is to redesign the shader cores in TEAPOT, a cycle-accurate simulator for mobile-GPU systems, validate it's functionality and accuracy and then explore the new microarchitecture by performing experiments on it.
Document Type: master thesis
File Description: application/pdf
Language: English
Relation: http://hdl.handle.net/2117/170041; 144359
Availability: http://hdl.handle.net/2117/170041
Rights: Open Access
Accession Number: edsbas.385579C7
Database: BASE
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