HighP5: Programming using Partitioned Parallel Processing Spaces

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Název: HighP5: Programming using Partitioned Parallel Processing Spaces
Autoři: Muhammad Nur Yanhaona, Andrew Grimshaw, Shahriar Hasan Mickey
Zdroj: Journal of the Brazilian Computer Society. 30:653-687
Informace o vydavateli: Sociedade Brasileira de Computacao - SB, 2024.
Rok vydání: 2024
Témata: 0202 electrical engineering, electronic engineering, information engineering, 02 engineering and technology
Popis: HighP5 is a new high-level parallel programming language designed to help software developers to achieve three objectives simultaneously: programmer productivity, program portability, and superior program performance. HighP5 enables this by fostering a new programming paradigm that we call hardware-cognizant parallel programming. The paradigm uses a uniform hardware abstraction and a declarative programming syntax to allow programmers to write hardware feature-sensitive efficient programs without delving into the detail of those feature implementations. This paper is the first comprehensive description of HighP5's design rationale, language grammar, and core features. It also discusses the runtime behavior of HighP5 programs. In addition, the paper presents preliminary results on program performance from HighP5 compilers on three different architectural platforms: shared-memory multiprocessors, distributed memory multi-computers, and hybrid GPU/multi-computers.
Druh dokumentu: Article
ISSN: 1678-4804
DOI: 10.5753/jbcs.2024.4345
Rights: CC BY
Přístupové číslo: edsair.doi...........3a4428c6e0208c6abb13db14c3ea4426
Databáze: OpenAIRE
Popis
Abstrakt:HighP5 is a new high-level parallel programming language designed to help software developers to achieve three objectives simultaneously: programmer productivity, program portability, and superior program performance. HighP5 enables this by fostering a new programming paradigm that we call hardware-cognizant parallel programming. The paradigm uses a uniform hardware abstraction and a declarative programming syntax to allow programmers to write hardware feature-sensitive efficient programs without delving into the detail of those feature implementations. This paper is the first comprehensive description of HighP5's design rationale, language grammar, and core features. It also discusses the runtime behavior of HighP5 programs. In addition, the paper presents preliminary results on program performance from HighP5 compilers on three different architectural platforms: shared-memory multiprocessors, distributed memory multi-computers, and hybrid GPU/multi-computers.
ISSN:16784804
DOI:10.5753/jbcs.2024.4345