A 10 Gb/s Low Swing Receiver for Power Optimization by Accelerated Bit Error Rate Testing.
Saved in:
| Title: | A 10 Gb/s Low Swing Receiver for Power Optimization by Accelerated Bit Error Rate Testing. |
|---|---|
| Authors: | Kramer, J.I., Kiamilev, F. |
| Source: | 2006 49th IEEE International Midwest Symposium on Circuits & Systems; 2006, p105-108, 4p |
| Database: | Complementary Index |
Full Text Finder | ISBN: | 9781424401734 |
|---|---|
| DOI: | 10.1109/MWSCAS.2006.382219 |