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Content-Addressable Memory (CAM) Circuits and Architectures: A Tutorial and Survey.

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Bibliographic Details
Title: Content-Addressable Memory (CAM) Circuits and Architectures: A Tutorial and Survey.
Authors: Pagiamtzis, Kostas, Sheikholeslami, Ali
Source: IEEE Journal of Solid-State Circuits; Mar2006, Vol. 41 Issue 3, p712-727, 16p, 2 Black and White Photographs, 23 Diagrams, 7 Charts
Subject Terms: COMPUTER storage devices, NETWORK routers, DATA packeting, COMPUTER architecture, DETECTORS, ENERGY consumption
Abstract: We survey recent developments in the design of large-capacity content-addressable memory (CAM). A CAM is a memory that implements the lookup-table function in a single clock cycle using dedicated comparison circuitry. CAMs are especially popular in network routers for packet forwarding and packet classification, but they are also beneficial in a variety of other applications that require high-speed table lookup. The main CAM-design challenge is to reduce power consumption associated with the large amount of parallel active circuitry, without sacrificing speed or memory density. In this paper, we review CAM-design techniques at the circuit level and at the architectural level. At the circuit level, we review low-power matchline sensing techniques and searchline driving approaches. At the architectural level we review three methods for reducing power consumption. [ABSTRACT FROM AUTHOR]
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Database: Complementary Index
Description
Abstract:We survey recent developments in the design of large-capacity content-addressable memory (CAM). A CAM is a memory that implements the lookup-table function in a single clock cycle using dedicated comparison circuitry. CAMs are especially popular in network routers for packet forwarding and packet classification, but they are also beneficial in a variety of other applications that require high-speed table lookup. The main CAM-design challenge is to reduce power consumption associated with the large amount of parallel active circuitry, without sacrificing speed or memory density. In this paper, we review CAM-design techniques at the circuit level and at the architectural level. At the circuit level, we review low-power matchline sensing techniques and searchline driving approaches. At the architectural level we review three methods for reducing power consumption. [ABSTRACT FROM AUTHOR]
ISSN:00189200
DOI:10.1109/JSSC.2005.864128