Bibliographische Detailangaben
| Titel: |
Design a self-controlled high-performance evaluation of content addressable memories using 45 nm technology. |
| Autoren: |
Inamanamelluri, Saidulu, Dhanasekaran, Devaraj, Baskar, Radhika |
| Quelle: |
Indonesian Journal of Electrical Engineering & Computer Science; Mar2024, Vol. 33 Issue 3, p1397-1404, 8p |
| Schlagwörter: |
IDEAL sources (Electric circuits), MEMORY |
| Abstract: |
A special type of random access memory (RAM) array called as content addressable memory (CAM), in which stored data is compared with the search data which can be returning the address. In the applications of highspeed searching, the CAMs are used. NOR type matchline CAMs are helpful for applications requiring faster search speeds. Because the NOR type match line (ML) CAM consumes a lot of power, therefore many published designs have attempted to reduce power consumption. The design self-controlled high-performance content addressable memories (SC-CAM) using 45-nm technology is presented in this paper. The 6T 4×4 CAM arrays in this paper uses SC logic and Tanner tools 45-nm technology. When compared to the conventional CAM, described SC-CAM architecture reduces the number of voltages sources. Described 6T 4×4 SC-CAM design needs less number of MOSFETs than existed 8T 4×4 CAM array and thus reduces the area with high speed. [ABSTRACT FROM AUTHOR] |
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| Datenbank: |
Complementary Index |