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A Novel Fractional Delay Proportional–Integral Multi-Resonant-Type Repetitive Control Based on a Farrow-Structure Filter for Grid-Tied Inverters.

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Title: A Novel Fractional Delay Proportional–Integral Multi-Resonant-Type Repetitive Control Based on a Farrow-Structure Filter for Grid-Tied Inverters.
Authors: Liang, Fen, Lee, Ho-Joon, Zhao, Qiangsong
Source: Electronics (2079-9292); Oct2023, Vol. 12 Issue 19, p4010, 17p
Subject Terms: STEADY-state responses, DYNAMIC simulation, GRIDS (Cartography), STOCHASTIC integrals
Abstract: The integer-order delay of proportional–integral multi-resonant-type repetitive control (PIMR-RC) cannot provide excellent control performance for grid-tied inverters when the grid frequency fluctuates. To address this issue and reduce control errors, a fractional delay PIMR-RC (FD-PIMR-RC) scheme is proposed. In addition, to reduce the computational load and memory consumption, a Farrow-structure fractional delay (FFD) filter is adopted. The digital filter with the Farrow structure is flexibly and efficiently used for fractional delay. For each new fractional delay, a large number of calculations and storage for the FFD filter coefficients are avoided, which significantly reduces the computational load and memory consumption. The parameter design of the FD-PIMR-RC scheme is provided in detail, including the implementation of fractional delay based on the Farrow structure. Then, a system stability analysis and parameter optimization are presented. Finally, simulations for the steady-state and dynamic responses are presented, and the validity of the proposed method is demonstrated. [ABSTRACT FROM AUTHOR]
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Database: Complementary Index
Description
Abstract:The integer-order delay of proportional–integral multi-resonant-type repetitive control (PIMR-RC) cannot provide excellent control performance for grid-tied inverters when the grid frequency fluctuates. To address this issue and reduce control errors, a fractional delay PIMR-RC (FD-PIMR-RC) scheme is proposed. In addition, to reduce the computational load and memory consumption, a Farrow-structure fractional delay (FFD) filter is adopted. The digital filter with the Farrow structure is flexibly and efficiently used for fractional delay. For each new fractional delay, a large number of calculations and storage for the FFD filter coefficients are avoided, which significantly reduces the computational load and memory consumption. The parameter design of the FD-PIMR-RC scheme is provided in detail, including the implementation of fractional delay based on the Farrow structure. Then, a system stability analysis and parameter optimization are presented. Finally, simulations for the steady-state and dynamic responses are presented, and the validity of the proposed method is demonstrated. [ABSTRACT FROM AUTHOR]
ISSN:20799292
DOI:10.3390/electronics12194010