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Trellis-coded multidimensional fast frequency shift keying modulation by use of multistage decoding.

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Název: Trellis-coded multidimensional fast frequency shift keying modulation by use of multistage decoding.
Autoři: Saito, Hidetoshi, Kohno, Ryuji
Zdroj: Electronics & Communications in Japan, Part 3: Fundamental Electronic Science; Mar2000, Vol. 83 Issue 3, p70-83, 14p
Témata: ELECTRONIC modulation, DECODERS (Electronics), CODING theory, PHASE shift keying, ALGORITHMS, ELECTRIC circuits, ELECTRICAL engineering
Abstrakt: The case when the modulation index is 0.5 in continuous phase frequency shift keying (CPFSK) is called fast frequency shift keying (FFSK). In this paper, a trellis-coded multidimensional modulation scheme using FFSK is proposed. In implementing a multidimensional modulation system, the complexity of decoding associated with the maximum likelihood decoding based on a Viterbi algorithm and the trellis coding design become problematic. In particular, the latter is influenced significantly by the path memory of the Viterbi decoder and the size of the scale of the ACS circuit, becoming a big problem in implementing the system. Thus, in this scheme, the complexity of decoding is alleviated by constructing the trellis decoder from multiple finite state machines and using a pseudo-multistage decoding method. Thus, the search and optimization of codes capable of using this multistage decoding algorithm are investigated. The bit error rate performance of codes having less decoding complexity as compared with the past best decoding is evaluated by computer simulation and the efficacy of the proposed scheme is shown. ©1999 Scripta Technica, Electron Comm Jpn Pt 3, 83(3): 70–83, 2000 [ABSTRACT FROM AUTHOR]
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Databáze: Complementary Index
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Abstrakt:The case when the modulation index is 0.5 in continuous phase frequency shift keying (CPFSK) is called fast frequency shift keying (FFSK). In this paper, a trellis-coded multidimensional modulation scheme using FFSK is proposed. In implementing a multidimensional modulation system, the complexity of decoding associated with the maximum likelihood decoding based on a Viterbi algorithm and the trellis coding design become problematic. In particular, the latter is influenced significantly by the path memory of the Viterbi decoder and the size of the scale of the ACS circuit, becoming a big problem in implementing the system. Thus, in this scheme, the complexity of decoding is alleviated by constructing the trellis decoder from multiple finite state machines and using a pseudo-multistage decoding method. Thus, the search and optimization of codes capable of using this multistage decoding algorithm are investigated. The bit error rate performance of codes having less decoding complexity as compared with the past best decoding is evaluated by computer simulation and the efficacy of the proposed scheme is shown. ©1999 Scripta Technica, Electron Comm Jpn Pt 3, 83(3): 70–83, 2000 [ABSTRACT FROM AUTHOR]
ISSN:10420967
DOI:10.1002/(SICI)1520-6440(200003)83:3<70::AID-ECJC8>3.0.CO;2-X