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Joint Crosstalk-Avoidance and Error-Correction Coding for Parallel Data Buses.

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Bibliographic Details
Title: Joint Crosstalk-Avoidance and Error-Correction Coding for Parallel Data Buses.
Authors: Niesen, Urs, Kudekar, Shrinivas
Source: IEEE Transactions on Information Theory; Mar2019, Vol. 65 Issue 3, p1626-1638, 13p
Subject Terms: ERROR correction (Information theory), ON-chip transformers, INTEGRATED circuits, ENERGY consumption, PROBABILITY theory
Abstract: Communication in integrated circuits faces two major impediments: inter-wire capacitive coupling and noise. Coding can be used to address both these problems. So-called crosstalk-avoidance codes mitigate capacitive coupling, and traditional error-correction codes introduce resilience against channel errors. Unfortunately, crosstalk-avoidance and error-correction codes cannot be combined in a straightforward manner. On the one hand, crosstalk-avoidance encoding followed by error-correction encoding destroys the crosstalk-avoidance property. On the other hand, error-correction encoding followed by crosstalk-avoidance encoding causes the crosstalk-avoidance decoder to fail in the presence of errors. Existing approaches circumvent this difficulty by using additional bus wires to protect the parities generated from the output of the error-correction encoder, and are therefore inefficient. In this paper, we propose a novel joint crosstalk-avoidance and error-correction coding and decoding scheme that provides higher bus transmission rates compared with existing approaches. Our joint approach carefully embeds the parities such that the crosstalk-avoidance property is preserved. We analyze the rate and minimum distance of the proposed scheme. We also provide a density evolution analysis and predict iterative decoding thresholds for reliable communication under random bus erasures. This density evolution analysis is nonstandard, since the crosstalk-avoidance constraints are inherently nonlinear. [ABSTRACT FROM AUTHOR]
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Database: Complementary Index
Description
Abstract:Communication in integrated circuits faces two major impediments: inter-wire capacitive coupling and noise. Coding can be used to address both these problems. So-called crosstalk-avoidance codes mitigate capacitive coupling, and traditional error-correction codes introduce resilience against channel errors. Unfortunately, crosstalk-avoidance and error-correction codes cannot be combined in a straightforward manner. On the one hand, crosstalk-avoidance encoding followed by error-correction encoding destroys the crosstalk-avoidance property. On the other hand, error-correction encoding followed by crosstalk-avoidance encoding causes the crosstalk-avoidance decoder to fail in the presence of errors. Existing approaches circumvent this difficulty by using additional bus wires to protect the parities generated from the output of the error-correction encoder, and are therefore inefficient. In this paper, we propose a novel joint crosstalk-avoidance and error-correction coding and decoding scheme that provides higher bus transmission rates compared with existing approaches. Our joint approach carefully embeds the parities such that the crosstalk-avoidance property is preserved. We analyze the rate and minimum distance of the proposed scheme. We also provide a density evolution analysis and predict iterative decoding thresholds for reliable communication under random bus erasures. This density evolution analysis is nonstandard, since the crosstalk-avoidance constraints are inherently nonlinear. [ABSTRACT FROM AUTHOR]
ISSN:00189448
DOI:10.1109/TIT.2018.2859405