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Industry perspective: Limits of energy efficiency for conventional CMOS and the need for adiabatic reversible computing.

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Titel: Industry perspective: Limits of energy efficiency for conventional CMOS and the need for adiabatic reversible computing.
Autoren: Frank, Michael P.1 (AUTHOR) mike@vaire.co, Edwards, Alexander J.2 (AUTHOR)
Quelle: APL Electronic Devices. Sep2025, Vol. 1 Issue 3, p1-6. 6p.
Schlagwörter: *REVERSIBLE computing, *COMPUTER logic, *SEMICONDUCTOR industry, *ENERGY consumption, *POTENTIAL energy, *DIGITAL technology
Abstract: The semiconductor industry's public roadmaps paint a dire picture of diminishing returns, with gate-level power efficiency (expressed in, for example, TOPS/W) projected to increase by only about a factor of two over the next dozen years. This suggests that improvements in the low-level computational performance of power-constrained products and the cost-efficiency of raw compute in energy terms will be similarly limited. The reasons for this are not solely due to lithography challenges, but rather they trace back to fundamental thermodynamic constraints on the magnitude of the potential energy differences required to operate a reliable field-effect switch. No amount of miniaturization alone can overcome these limits. However, there is an alternative paradigm for semiconductor-based digital logic, which I call Adiabatic Reversible CMOS, or ARC, which offers a path toward ongoing improvement in digital power-performance through recovery and reuse of switching energies using high-quality resonant oscillators. Although engineering these new systems is challenging, it offers the potential to leverage increasing device densities in future technology nodes to achieve greater performance per unit area and power than is possible in conventional digital technology. This Perspectives article discusses the motivation and prospects for the ARC paradigm, which we at Vaire Computing believe will inevitably underpin the future digital computing industry. [ABSTRACT FROM AUTHOR]
Datenbank: Academic Search Index
Beschreibung
Abstract:The semiconductor industry's public roadmaps paint a dire picture of diminishing returns, with gate-level power efficiency (expressed in, for example, TOPS/W) projected to increase by only about a factor of two over the next dozen years. This suggests that improvements in the low-level computational performance of power-constrained products and the cost-efficiency of raw compute in energy terms will be similarly limited. The reasons for this are not solely due to lithography challenges, but rather they trace back to fundamental thermodynamic constraints on the magnitude of the potential energy differences required to operate a reliable field-effect switch. No amount of miniaturization alone can overcome these limits. However, there is an alternative paradigm for semiconductor-based digital logic, which I call Adiabatic Reversible CMOS, or ARC, which offers a path toward ongoing improvement in digital power-performance through recovery and reuse of switching energies using high-quality resonant oscillators. Although engineering these new systems is challenging, it offers the potential to leverage increasing device densities in future technology nodes to achieve greater performance per unit area and power than is possible in conventional digital technology. This Perspectives article discusses the motivation and prospects for the ARC paradigm, which we at Vaire Computing believe will inevitably underpin the future digital computing industry. [ABSTRACT FROM AUTHOR]
ISSN:29958423
DOI:10.1063/5.0279617