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Scheduling residency time-constrained single-armed cluster tools with two-wafer types via mixed integer programming model.

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Titel: Scheduling residency time-constrained single-armed cluster tools with two-wafer types via mixed integer programming model.
Autoren: Yang, Fajun1 (AUTHOR) fjyang@shu.edu.cn, Li, Chao1,2 (AUTHOR) 2411065@xdsisu.edu.cn, Zhen, Lu1 (AUTHOR) lzhen@shu.edu.cn, Zhang, Chunjiang3 (AUTHOR) zhangcj@hust.edu.cn, Wu, Naiqi1,4 (AUTHOR) nqwu@must.edu.mo
Quelle: Expert Systems with Applications. Sep2025, Vol. 288, pN.PAG-N.PAG. 1p.
Schlagwörter: *INTEGER programming, *PARALLEL processing, *ECONOMIC impact, *POPULARITY, *ROBOTS
Abstract: • Study the challenging scheduling problem of single-armed cluster tools for concurrently processing two types of wafers. • Find that the performance is dependent on the release sequence of wafer types and the sequence of how the tasks are performed. • A mixed integer programming model is formulated to determine the optimal wafer release sequence and robot task sequence. • Experiments demonstrate the efficiency and effectiveness of the proposed method. Cluster tools are extensively utilized in semiconductor manufacturing. To enhance throughput, concurrent processing of two wafer types within a cluster tool has gained popularity. For the cyclic scheduling problem of residency time-constrained single-armed cluster tools that concurrently process two wafer types, prior studies have predominantly relied on predefined robot task sequences, leading to suboptimal throughput and a low wafer residency time constraint-satisfaction ratio, thereby bringing a negative impact on economic benefits. To fill this gap, a mixed integer programming model is derived to optimize the release sequence of wafer types and robot task sequence so that throughput and wafer residency time constraint-satisfaction ratio can be maximized. Extensions to general cases with more wafer types and parallel processing chambers are also given. Compared with the existing studies, experimental results based on large randomly generated instances show that the average throughput is increased by at least 5%, and the average wafer residency time constraint-satisfaction ratio is enhanced by 115.41%. Moreover, the average computing time for all cases remains no more than three minutes. Hence, we believe that the proposed techniques could bring significant economic advantages to semiconductor fabrication plants. [ABSTRACT FROM AUTHOR]
Datenbank: Academic Search Index
Beschreibung
Abstract:• Study the challenging scheduling problem of single-armed cluster tools for concurrently processing two types of wafers. • Find that the performance is dependent on the release sequence of wafer types and the sequence of how the tasks are performed. • A mixed integer programming model is formulated to determine the optimal wafer release sequence and robot task sequence. • Experiments demonstrate the efficiency and effectiveness of the proposed method. Cluster tools are extensively utilized in semiconductor manufacturing. To enhance throughput, concurrent processing of two wafer types within a cluster tool has gained popularity. For the cyclic scheduling problem of residency time-constrained single-armed cluster tools that concurrently process two wafer types, prior studies have predominantly relied on predefined robot task sequences, leading to suboptimal throughput and a low wafer residency time constraint-satisfaction ratio, thereby bringing a negative impact on economic benefits. To fill this gap, a mixed integer programming model is derived to optimize the release sequence of wafer types and robot task sequence so that throughput and wafer residency time constraint-satisfaction ratio can be maximized. Extensions to general cases with more wafer types and parallel processing chambers are also given. Compared with the existing studies, experimental results based on large randomly generated instances show that the average throughput is increased by at least 5%, and the average wafer residency time constraint-satisfaction ratio is enhanced by 115.41%. Moreover, the average computing time for all cases remains no more than three minutes. Hence, we believe that the proposed techniques could bring significant economic advantages to semiconductor fabrication plants. [ABSTRACT FROM AUTHOR]
ISSN:09574174
DOI:10.1016/j.eswa.2025.128209