Shibata, N., & Morimura, H. (1999). Size-configurable 200-MHz low-power SRAM macrocells for MPEG2 video-encoding LSIs: Performance enhancement with embedded registers. Electronics & Communications in Japan, Part 2: Electronics, 82(1), 1. https://doi.org/10.1002/(SICI)1520-6432(199901)82:1<1::AID-ECJB1>3.0.CO;2-3
Chicago-Zitierstil (17. Ausg.)Shibata, Nobutaro, und Hiroki Morimura. "Size-configurable 200-MHz Low-power SRAM Macrocells for MPEG2 Video-encoding LSIs: Performance Enhancement with Embedded Registers." Electronics & Communications in Japan, Part 2: Electronics 82, no. 1 (1999): 1. https://doi.org/10.1002/(SICI)1520-6432(199901)82:1<1::AID-ECJB1>3.0.CO;2-3.
MLA-Zitierstil (9. Ausg.)Shibata, Nobutaro, und Hiroki Morimura. "Size-configurable 200-MHz Low-power SRAM Macrocells for MPEG2 Video-encoding LSIs: Performance Enhancement with Embedded Registers." Electronics & Communications in Japan, Part 2: Electronics, vol. 82, no. 1, 1999, p. 1, https://doi.org/10.1002/(SICI)1520-6432(199901)82:1<1::AID-ECJB1>3.0.CO;2-3.