A g m /I D Methodology Based Data-Driven Search Algorithm For the Design of Multi-Stage Multi-Path Feed-Forward-Compensated Amplifiers Targeting High Speed Continuous-Time Σ∆-Modulators
This work presents a methodology for sizing transistors of a multi-stage, multi-path capacitor-less feed-forward compensated operational amplifiers employed in advanced CMOS process implementation of continuous-time bandpass Σ∆-modulators. The paper describes the methodology: on system level, dealin...
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| Veröffentlicht in: | IEEE transactions on computer-aided design of integrated circuits and systems S. 1 |
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| Hauptverfasser: | , , , |
| Format: | Journal Article |
| Sprache: | Englisch |
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17.01.2020
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| ISSN: | 0278-0070 |
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| Abstract | This work presents a methodology for sizing transistors of a multi-stage, multi-path capacitor-less feed-forward compensated operational amplifiers employed in advanced CMOS process implementation of continuous-time bandpass Σ∆-modulators. The paper describes the methodology: on system level, dealing with the placement of poles and zeros; and on circuit level, discussing issues related to biasing, frequency response and other important performance metrics of the basic diff-pair. Algorithms are provided to simplify mathematical aspects of the work. The validity and the limitations of the proposed methodology are further discussed from the single-pole system used to model the individual amplification stages of the multi-stage amplifier. The worthiness of the proposed methodology in sizing the transistors of complex amplifier structures such as the capacitor-less multi-stage, multi-path feed-forward-compensated amplifiers is demonstrated using two design examples. A 3 rd-order amplifier with a DC gain of 52.6 dB and that reaches a unity-gain frequency of above 14 GHz while consuming only 5.6 mA from a 1 V supply; and a 4 th-order amplifier with DC gain of 73.5 dB that achieves a 25.7 dB gain at 1 GHz while consuming 4.8 mW are designed in 28nm CMOS FDSOI. |
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| AbstractList | This work presents a methodology for sizing transistors of a multi-stage, multi-path capacitor-less feed-forward compensated operational amplifiers employed in advanced CMOS process implementation of continuous-time bandpass Σ∆-modulators. The paper describes the methodology: on system level, dealing with the placement of poles and zeros; and on circuit level, discussing issues related to biasing, frequency response and other important performance metrics of the basic diff-pair. Algorithms are provided to simplify mathematical aspects of the work. The validity and the limitations of the proposed methodology are further discussed from the single-pole system used to model the individual amplification stages of the multi-stage amplifier. The worthiness of the proposed methodology in sizing the transistors of complex amplifier structures such as the capacitor-less multi-stage, multi-path feed-forward-compensated amplifiers is demonstrated using two design examples. A 3 rd-order amplifier with a DC gain of 52.6 dB and that reaches a unity-gain frequency of above 14 GHz while consuming only 5.6 mA from a 1 V supply; and a 4 th-order amplifier with DC gain of 73.5 dB that achieves a 25.7 dB gain at 1 GHz while consuming 4.8 mW are designed in 28nm CMOS FDSOI. |
| Author | Aboushady, Hassan Gebreyohannes, Fikre Tsigabu Louërat, Marie-Minerve Porte, Jacky |
| Author_xml | – sequence: 1 givenname: Fikre Tsigabu orcidid: 0000-0001-7149-9556 surname: Gebreyohannes fullname: Gebreyohannes, Fikre Tsigabu organization: Circuits Intégrés Numériques et Analogiques – sequence: 2 givenname: Jacky surname: Porte fullname: Porte, Jacky organization: Circuits Intégrés Numériques et Analogiques – sequence: 3 givenname: Marie-Minerve orcidid: 0000-0001-9669-1085 surname: Louërat fullname: Louërat, Marie-Minerve organization: Circuits Intégrés Numériques et Analogiques – sequence: 4 givenname: Hassan orcidid: 0000-0003-3489-5968 surname: Aboushady fullname: Aboushady, Hassan organization: Circuits Intégrés Numériques et Analogiques |
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| Keywords | multi-path feed-forward compensation multi-stage search algorithm continuous time sigma delta modulator g m /i D methodology operational amplifier Matlab script |
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| Title | A g m /I D Methodology Based Data-Driven Search Algorithm For the Design of Multi-Stage Multi-Path Feed-Forward-Compensated Amplifiers Targeting High Speed Continuous-Time Σ∆-Modulators |
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