Rona, M., & Krampl, G. (2001, March 13). Modelling SoC devices for virtual test using VHDL. Proceedings of the conference on Design, automation and test in Europe, 770-771. https://doi.org/10.5555/367072.367966
Citace podle Chicago (17th ed.)Rona, M., a G. Krampl. "Modelling SoC Devices for Virtual Test Using VHDL." Proceedings of the Conference on Design, Automation and Test in Europe 13 Mar. 2001: 770-771. https://doi.org/10.5555/367072.367966.
Citace podle MLA (9th ed.)Rona, M., a G. Krampl. "Modelling SoC Devices for Virtual Test Using VHDL." Proceedings of the Conference on Design, Automation and Test in Europe, 13 Mar. 2001, pp. 770-771, https://doi.org/10.5555/367072.367966.
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