Investigating Energy Consumption of an SRAM-based FPGA for Duty-Cycle Applications
In order to conserve energy, battery powered embedded systems are typically designed with very low-power modules that offer limited computational power and communication bandwidth and therefore, are generally applicable to low-sample-rate intermittent applications. On the other hand, enabling an emb...
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| Published in: | Parallel computing : accelerating computational science and engineering (CSE) p. 548 |
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| Main Authors: | , |
| Format: | Conference Proceeding |
| Language: | English |
| Published: |
2014
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| Subjects: | |
| ISBN: | 9781614993803, 1614993807 |
| Online Access: | Get full text |
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| Summary: | In order to conserve energy, battery powered embedded systems are typically designed with very low-power modules that offer limited computational power and communication bandwidth and therefore, are generally applicable to low-sample-rate intermittent applications. On the other hand, enabling an embedded system with a high-throughput processing resource such as an FPGA, high-throughput processing performance that is typically required in high-sample rate monitoring applications can be achieved. However, the high power consumption associated with an FPGA poses a major challenge in attaining significant lifetime for a battery-powered embedded system. In this paper, we investigate energy consumption of an SRAM-based FPGA in relation to duty-cycle applications. In order to achieve long operational lifetime in an FPGA-based embedded system, the possible options to dynamically manage the power consumption are studied and discussed. The experimental results suggest that the SRAM-based FPGA, XC6SLX16 that provides ample logic resources in relation to typical high-sample rate monitoring applications, can be used in a battery operated embedded systems while minimizing the energy consumption to 2.56 mJ for inactive duration of 235 ms or above. |
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| ISBN: | 9781614993803 1614993807 |
| DOI: | 10.3233/978-1-61499-381-0-548 |

