Computer Arithmetic Algorithms and Implementations
This chapter first introduces two types of the binary representations: unsigned number (absolute) and 2's complement representation for signed integers. It then describes the binary addition and subtraction algorithms and their implementations in Verilog HDL. A carry‐lookahead adder is also des...
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| Vydáno v: | Computer Principles and Design in Verilog HDL s. 63 - 110 |
|---|---|
| Hlavní autoři: | , |
| Médium: | Kapitola |
| Jazyk: | angličtina |
| Vydáno: |
Singapore
Wiley
2015
John Wiley & Sons, Incorporated John Wiley & Sons, Ltd |
| Témata: | |
| ISBN: | 1118841093, 9781118841099 |
| On-line přístup: | Získat plný text |
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| Abstract | This chapter first introduces two types of the binary representations: unsigned number (absolute) and 2's complement representation for signed integers. It then describes the binary addition and subtraction algorithms and their implementations in Verilog HDL. A carry‐lookahead adder is also described. Next, the chapter discusses unsigned and signed binary multiplication algorithms and their implementations in Verilog HDL. The Wallace tree, which is a high‐speed multiplication circuit, is also introduced. It then introduces unsigned binary division algorithms, including the restoring algorithm, the non‐restoring algorithm, the Goldschmidt algorithm, and the Newton‐Raphson algorithm. The Verilog HDL codes that implement these algorithms and their simulation waveforms are also given. The chapter also introduces binary square root algorithms, including the restoring algorithm, the nonrestoring algorithm, the Goldschmidt algorithm, and the Newton‐Raphson algorithm. The Verilog HDL codes that implement these algorithms and their simulation waveforms are also given. |
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| AbstractList | This chapter first introduces two types of the binary representations: unsigned number (absolute) and 2's complement representation for signed integers. It then describes the binary addition and subtraction algorithms and their implementations in Verilog HDL. A carry‐lookahead adder is also described. Next, the chapter discusses unsigned and signed binary multiplication algorithms and their implementations in Verilog HDL. The Wallace tree, which is a high‐speed multiplication circuit, is also introduced. It then introduces unsigned binary division algorithms, including the restoring algorithm, the non‐restoring algorithm, the Goldschmidt algorithm, and the Newton‐Raphson algorithm. The Verilog HDL codes that implement these algorithms and their simulation waveforms are also given. The chapter also introduces binary square root algorithms, including the restoring algorithm, the nonrestoring algorithm, the Goldschmidt algorithm, and the Newton‐Raphson algorithm. The Verilog HDL codes that implement these algorithms and their simulation waveforms are also given. |
| Author | Li, Yamin Tsinghua University Press |
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| PublicationTitle | Computer Principles and Design in Verilog HDL |
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| Snippet | This chapter first introduces two types of the binary representations: unsigned number (absolute) and 2's complement representation for signed integers. It... |
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| StartPage | 63 |
| SubjectTerms | binary addition algorithms binary division algorithms binary multiplication algorithms binary square root algorithms binary subtraction algorithms carry‐lookahead adder Verilog HDL Wallace tree |
| Title | Computer Arithmetic Algorithms and Implementations |
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