Algorithms and architectures for high-performance IP lookup and packet classification engines - Ganegedara, Thilan (ProQuest Dissertations & Theses, 2013)
The Internet has become ubiquitous within the past few decades. The number of active users of the Internet has reached 2.5 billion and the number of Internet connected devices has reached 11 billion in year 2012. Considering this proliferation of Internet users and devices, forecasts show that the network traffic is expected to grow threefold between 2012 and 2017, which will result in a 1.4 Zettabytes of data exchange on the Internet in the year of 2017. These enormous amounts of traffic in the Internet demands high forwarding rates to satisfy the requirements of various time-critical applications. For example, multimedia applications such as video streaming, Voice over IP (VoIP) and gaming, require high bandwidth and low latency packet delivery. To meet such demands, network speeds have significantly increased since the inception of Internet; 10 Mbps to 100 Gbps rates within three decades. Such improvements in throughput are facilitated by the advancements in the underlying forwarding algorithms and the processing platforms used for networking. The goal of this research is to harness the processing capabilities and memory capacities of current state-of-the-art hardware and software platforms to devise wire-speed packet forwarding engines that are suitable for the future Internet. Even though the existing networking platforms possess the raw processing power and memory capacity, designing packet forwarding engines that meet the performance demands of future networks is not straightforward. It requires leveraging both algorithmic and architectural aspects of the solution and the platform, respectively, which forms the basis for our research. Specifically, four research problems are studied in this dissertation. They are as follows: • Scalable router virtualization with dynamic updates: With the advent of data centers and cloud computing, router virtualization is gaining popularity in the networking industry. Dedicated networking equipment on a per user (or virtual network) basis is expensive as well as not scalable. Router virtualization allows consolidation of multiple physical routers onto a single shared platform. In this research, scalable algorithms and architectures for large-scale router virtualization are developed. Update capabilities are integrated into the lookup architecture to enable non-blocking, incremental routing table updates. • Performance modeling of virtual routers: Mapping multiple virtual routing tables onto a shared physical platform is challenging with stringent memory constraints, especially on hardware platforms. Furthermore, it is important to know how many virtual networks can be supported on a given amount of hardware resources and what the performance would be. Hence, theoretical models for virtualized router performance are developed and a comprehensive performance evaluation of virtual routers is presented. • High performance IPv6 forwarding for backbone routers: The successor of the most prevalent logical addressing scheme in the Internet (IPv4) is IPv6. With this, several challenges arise from the packet forwarding engine's standpoint: 1) increased routing table storage requirement, 2) increased lookup complexity 3) sustaining high performance. A versatile IPv6 lookup engine is developed that is suitable for both software and hardware platforms. The performance of the proposed approach evaluated on both software and hardware platforms show that the solution is suitable to be deployed in state-of-the-art 100 Gbps line-cards. • Ruleset-feature independent packet classification: Most packet classification solutions rely on various features of the classifier (or ruleset) to achieve low memory consumption and their reported performance. However, the unavailability such classifier features may cause such solutions to yield poor performance, rendering them to be suitable for only a subset of classifiers. A ruleset-feature independent packet classification engine that delivers deterministic performance for any classifier is proposed and evaluated. The aforementioned solutions are evaluated using state-of-the-art Field Programmable Gate Arrays (FPGAs). The IPv6 forwarding engine is implemented on both FPGA and general purpose multi-core processors to illustrate the versatility of the proposed solution. Performance evaluations demonstrate superior performance compared with existing solutions, with respect to throughput, memory consumption and power consumption. While the Internet backbone links are being upgraded to 100 Gbps rates, 400 Gbps and even 1 Tbps links are in the roadmap. Achieving such throughput rates while ensuring power and packet latency demands are met is a challenging task. This dissertation takes a step in this direction by proposing and developing novel lookup algorithms for packet forwarding engines that will meet and exceed the demands of the future Internet.