APA (7th ed.) Citation

Hoshino, Y., Shimasaki, M., Namal, R., & Linh, D. T. (2023). Performance Verification and Latency Time Evaluation of Hardware Image Processing Module for Appearance Inspection Systems using FPGA. Journal of Real-Time Image Processing, 21, . https://doi.org/10.60692/mw7py-yz243

Chicago Style (17th ed.) Citation

Hoshino, Yukinobu, Masahiro Shimasaki, Rathnayake Namal, and Dang Tuan Linh. "Performance Verification and Latency Time Evaluation of Hardware Image Processing Module for Appearance Inspection Systems Using FPGA." Journal of Real-Time Image Processing 21 (2023). https://doi.org/10.60692/mw7py-yz243.

MLA (9th ed.) Citation

Hoshino, Yukinobu, et al. "Performance Verification and Latency Time Evaluation of Hardware Image Processing Module for Appearance Inspection Systems Using FPGA." Journal of Real-Time Image Processing, vol. 21, 2023, https://doi.org/10.60692/mw7py-yz243.