Neuron MOS Binary-Logic Integrated Circuits - Part I: Design Fundamentals and Soft- Hardware-Logic Circuit Implementation

In this part of the paper, we describe the fundamental designing principles of binary-logic circuits using a newly developed highly functional device called Neuron MOS Transistor(vMOS). vMOS is a single MOS transistor simulating the function of biological neurons. In order to facilitate the logic de...

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Vydané v:IEEE Transactions on Electron Devices Ročník 40; číslo 3; s. 570 - 576
Hlavný autor: 大見 忠弘
Médium: Journal Article
Jazyk:English
Vydavateľské údaje: Institute of Electrical and Electronics Engineers 1993
ISSN:0018-9383
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Shrnutí:In this part of the paper, we describe the fundamental designing principles of binary-logic circuits using a newly developed highly functional device called Neuron MOS Transistor(vMOS). vMOS is a single MOS transistor simulating the function of biological neurons. In order to facilitate the logic design procedures employing this new-concept transistor, a graphical technique which we call Floating-Gate Potential Diagram has been developed. It is shown that any Boolean functions can be generated using a common circuit configuration of two-stage vMOS inverters. One of the most striking features of vMOS binary-logic application is the realization of a so-called Soft Hardware Logic Circuit. The circuit can represent any logic functions such as AND, OR, NAND, NOR, Exclusive-NOR, Exclusive-OR, etc., by adjusting external control signals without any modifications in its hardware configuration. The circuit allows us to build real-time reconfigurable systems. Test circuits were fabricated by a double-polysilicon CMOS process and their operations were experimentally verified.
Bibliografia:ObjectType-Article-2
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ISSN:0018-9383
DOI:10.1109/16.199362