APA (7th ed.) Citation

忠弘, 大. (1993). Neuron MOS Binary-Logic Integrated Circuits - Part I: Design Fundamentals and Soft- Hardware-Logic Circuit Implementation. IEEE Transactions on Electron Devices, 40(3), 570-576. https://doi.org/10.1109/16.199362

Chicago Style (17th ed.) Citation

忠弘, 大見. "Neuron MOS Binary-Logic Integrated Circuits - Part I: Design Fundamentals and Soft- Hardware-Logic Circuit Implementation." IEEE Transactions on Electron Devices 40, no. 3 (1993): 570-576. https://doi.org/10.1109/16.199362.

MLA (9th ed.) Citation

忠弘, 大見. "Neuron MOS Binary-Logic Integrated Circuits - Part I: Design Fundamentals and Soft- Hardware-Logic Circuit Implementation." IEEE Transactions on Electron Devices, vol. 40, no. 3, 1993, pp. 570-576, https://doi.org/10.1109/16.199362.