Kalaiselvi, A., Jayadharshine, S., Shanthi, K., Geeth, R. S. K., & Tamizhmani, T. (2025, August 4). FPGA-Driven Low Power ECG Analyser with Robust Noise Handling. 2025 5th International Conference on Soft Computing for Security Applications (ICSCSA), 762-767. https://doi.org/10.1109/ICSCSA66339.2025.11171192
Citace podle Chicago (17th ed.)Kalaiselvi, A., S. Jayadharshine, K.G Shanthi, R S Kavee Geeth, a T. Tamizhmani. "FPGA-Driven Low Power ECG Analyser with Robust Noise Handling." 2025 5th International Conference on Soft Computing for Security Applications (ICSCSA) 4 Aug. 2025: 762-767. https://doi.org/10.1109/ICSCSA66339.2025.11171192.
Citace podle MLA (9th ed.)Kalaiselvi, A., et al. "FPGA-Driven Low Power ECG Analyser with Robust Noise Handling." 2025 5th International Conference on Soft Computing for Security Applications (ICSCSA), 4 Aug. 2025, pp. 762-767, https://doi.org/10.1109/ICSCSA66339.2025.11171192.