Hybrid-NL2SVA: Integrating RAG and Finetuning for LLM-based NL2SVA

SystemVerilog Assertions (SVAs) are critical for verifying the correctness of hardware designs, but manually writing them from natural language property descriptions, i.e., NL2SVA, remains a labor-intensive and error-prone task. Recent advances in large language models (LLMs) offer opportunities to...

Ausführliche Beschreibung

Bibliographische Detailangaben

Veröffentlicht in:	2025 ACM/IEEE 7th Symposium on Machine Learning for CAD (MLCAD) S. 1 - 10
Hauptverfasser:	Xiao, Weihua, Ekberg, Derek, Garg, Siddharth, Karri, Ramesh
Format:	Tagungsbericht
Sprache:	Englisch
Veröffentlicht:	IEEE 08.09.2025
Schlagworte:	Aerodynamics Annotations Evaluation Dataset Fine-tuning Hardware design languages Large Language Model Large language models Retrieval augmented generation Semantics Solid modeling Syntactics SystemVerilog Assertion Translation Writing
Online-Zugang:	Volltext
Tags:	Tag hinzufügen Keine Tags, Fügen Sie den ersten Tag hinzu!