APA (7th ed.) Citation

Bhattacharya, T., Kwon, D., Hutchinson, G. H., Zhang, X., Rozada, I., & Strukov, D. (2025, June 8). A Fully Integrated Mixed-Signal Compute-In-Memory Accelerator for Solving Arbitrary Order Boolean Satisfiability Problems. Digest of technical papers - Symposium on VLSI Technology, 1-3. https://doi.org/10.23919/VLSITechnologyandCir65189.2025.11074791

Chicago Style (17th ed.) Citation

Bhattacharya, Tinish, Dongseok Kwon, George Higgins Hutchinson, Xiangyi Zhang, Ignacio Rozada, and Dmitri Strukov. "A Fully Integrated Mixed-Signal Compute-In-Memory Accelerator for Solving Arbitrary Order Boolean Satisfiability Problems." Digest of Technical Papers - Symposium on VLSI Technology 8 Jun. 2025: 1-3. https://doi.org/10.23919/VLSITechnologyandCir65189.2025.11074791.

MLA (9th ed.) Citation

Bhattacharya, Tinish, et al. "A Fully Integrated Mixed-Signal Compute-In-Memory Accelerator for Solving Arbitrary Order Boolean Satisfiability Problems." Digest of Technical Papers - Symposium on VLSI Technology, 8 Jun. 2025, pp. 1-3, https://doi.org/10.23919/VLSITechnologyandCir65189.2025.11074791.