Continuous Optimization Algorithm for PCB Layout Based on Differential Evolution
In Printed Circuit Board (PCB) design, effective layout optimization is crucial for electrical performance, thermal management, and signal integrity. However, due to the inherently complex, high-dimensional nature of PCB layout problems, traditional optimization methods often struggle to deliver sat...
Gespeichert in:
| Veröffentlicht in: | 2024 5th International Symposium on Computer Engineering and Intelligent Communications (ISCEIC) S. 253 - 259 |
|---|---|
| Hauptverfasser: | , , |
| Format: | Tagungsbericht |
| Sprache: | Englisch |
| Veröffentlicht: |
IEEE
08.11.2024
|
| Schlagworte: | |
| Online-Zugang: | Volltext |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| Abstract | In Printed Circuit Board (PCB) design, effective layout optimization is crucial for electrical performance, thermal management, and signal integrity. However, due to the inherently complex, high-dimensional nature of PCB layout problems, traditional optimization methods often struggle to deliver satisfactory solutions. This paper presents a continuous optimization algorithm for PCB layout based on Differential Evolution (DE). As a global search algorithm, DE effectively explores complex continuous optimization spaces through mutation operations based on the differences among individual solutions, enabling the identification of optimal layouts. We begin by formulating the PCB layout problem as a constrained multi-objective optimization issue. Subsequently, we enhance the DE algorithm's adaptability by introducing an adaptive mutation operator, which improves the balance between global search and local exploitation. To validate the effectiveness of the proposed algorithm, we conducted experiments using a series of real-world PCB design cases. The results demonstrate that the DE-based PCB layout optimization algorithm outperforms traditional methods across multiple performance metrics, particularly in high-dimensional complex scenarios, showcasing superior global optimization capabilities and convergence speed. |
|---|---|
| AbstractList | In Printed Circuit Board (PCB) design, effective layout optimization is crucial for electrical performance, thermal management, and signal integrity. However, due to the inherently complex, high-dimensional nature of PCB layout problems, traditional optimization methods often struggle to deliver satisfactory solutions. This paper presents a continuous optimization algorithm for PCB layout based on Differential Evolution (DE). As a global search algorithm, DE effectively explores complex continuous optimization spaces through mutation operations based on the differences among individual solutions, enabling the identification of optimal layouts. We begin by formulating the PCB layout problem as a constrained multi-objective optimization issue. Subsequently, we enhance the DE algorithm's adaptability by introducing an adaptive mutation operator, which improves the balance between global search and local exploitation. To validate the effectiveness of the proposed algorithm, we conducted experiments using a series of real-world PCB design cases. The results demonstrate that the DE-based PCB layout optimization algorithm outperforms traditional methods across multiple performance metrics, particularly in high-dimensional complex scenarios, showcasing superior global optimization capabilities and convergence speed. |
| Author | Wang, Yu Chen, Tingting Chen, Yu |
| Author_xml | – sequence: 1 givenname: Yu surname: Wang fullname: Wang, Yu email: wangyu@whut.edu.cn organization: Wuhan University of Technology,Wuhan,China – sequence: 2 givenname: Tingting surname: Chen fullname: Chen, Tingting email: 15070160205@163.com organization: Wuhan University of Technology,Wuhan,China – sequence: 3 givenname: Yu surname: Chen fullname: Chen, Yu email: ychen@whut.edu.cn organization: Wuhan University of Technology,Wuhan,China |
| BookMark | eNo1j8tOwzAUBY0ECyj9AxbmAxJ87TzsZWtCiRSplei-cuJrsJTEVeogla-nCFjN5syR5o5cj2FEQh6BpQBMPdVvuqp1IQoQKWc8S4FJYFzAFVmqUkkhIAdZlOUt2ekwRj_OYT7R7TH6wX-Z6MNIV_17mHz8GKgLE93pNW3MOcyRrs0JLb0snr1zOOFFNz2tPkM__4j35MaZ_oTLPy7I_qXa69ek2W5qvWoSryAmtrSdsipzBQMlFUJn2hw7zqVEk2UGuMDW5bItW-tAZQZbodAoYSxwK6xYkIffW4-Ih-PkBzOdD_-d4huTVk9i |
| ContentType | Conference Proceeding |
| DBID | 6IE 6IL CBEJK RIE RIL |
| DOI | 10.1109/ISCEIC63613.2024.10810231 |
| DatabaseName | IEEE Electronic Library (IEL) Conference Proceedings IEEE Xplore POP ALL IEEE Xplore All Conference Proceedings IEEE Electronic Library IEEE Proceedings Order Plans (POP All) 1998-Present |
| DatabaseTitleList | |
| Database_xml | – sequence: 1 dbid: RIE name: IEEE Electronic Library url: https://ieeexplore.ieee.org/ sourceTypes: Publisher |
| DeliveryMethod | fulltext_linktorsrc |
| EISBN | 9798331518677 |
| EndPage | 259 |
| ExternalDocumentID | 10810231 |
| Genre | orig-research |
| GroupedDBID | 6IE 6IL CBEJK RIE RIL |
| ID | FETCH-LOGICAL-i91t-d7dc9d94f601989e1cab5ec2288ea44a123ebf58b7bdf194aeb39ea93ad12d3d3 |
| IEDL.DBID | RIE |
| IngestDate | Wed Jan 01 06:01:45 EST 2025 |
| IsPeerReviewed | false |
| IsScholarly | false |
| Language | English |
| LinkModel | DirectLink |
| MergedId | FETCHMERGED-LOGICAL-i91t-d7dc9d94f601989e1cab5ec2288ea44a123ebf58b7bdf194aeb39ea93ad12d3d3 |
| PageCount | 7 |
| ParticipantIDs | ieee_primary_10810231 |
| PublicationCentury | 2000 |
| PublicationDate | 2024-Nov.-8 |
| PublicationDateYYYYMMDD | 2024-11-08 |
| PublicationDate_xml | – month: 11 year: 2024 text: 2024-Nov.-8 day: 08 |
| PublicationDecade | 2020 |
| PublicationTitle | 2024 5th International Symposium on Computer Engineering and Intelligent Communications (ISCEIC) |
| PublicationTitleAbbrev | ISCEIC |
| PublicationYear | 2024 |
| Publisher | IEEE |
| Publisher_xml | – name: IEEE |
| Score | 1.8887247 |
| Snippet | In Printed Circuit Board (PCB) design, effective layout optimization is crucial for electrical performance, thermal management, and signal integrity. However,... |
| SourceID | ieee |
| SourceType | Publisher |
| StartPage | 253 |
| SubjectTerms | Arithmetic automatic PCB layout Convergence differential evolutionary arithmetic electronic design automation Evolutionary computation Layout Measurement multi-objective optimization Optimization Optimization methods Printed circuits sequential optimization Signal integrity Thermal management |
| Title | Continuous Optimization Algorithm for PCB Layout Based on Differential Evolution |
| URI | https://ieeexplore.ieee.org/document/10810231 |
| hasFullText | 1 |
| inHoldings | 1 |
| isFullTextHit | |
| isPrint | |
| link | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1NSwMxEA1aRDypWPGbCF63dj-THO3aYkHqgj30VrKZWS20u6XuFvz3TrZbxYMHLyGEgcAkw8tL8mYYuwsjYVGx6wRgqMmiriMNSCeLhFYG_G6KaV1sQoxGcjJRSSNWr7UwiFh_PsOO7dZv-VCYyl6VUYRLm2mAyM6uEGIj1tpnt03ezPvha9wfxpFPCEXEzws6W_tflVNq4Bgc_nPKI9b-keDx5BtcjtkO5icssbmkZnlFbJ2_UKwvGhElf5i_FcTy3xeczqA8iXv8WX8WVcl7BFLAyeKxKYRCAT3n_XWz4dpsPOiP4yenKYngzJRbOiDAKFDWpfavE7pGpyEaz5MSdRBogiFMs1CmIoXMVYEmqqxQK1-D64EP_ilr5UWOZ4yn4EUGQZvQyICiWgskpocZhJCZMIvOWdt6Y7rcJL2Ybh1x8cf4JTuwPq9levKKtcpVhddsz6zL2cfqpl6qL2YFmLY |
| linkProvider | IEEE |
| linkToHtml | http://cvtisr.summon.serialssolutions.com/2.0.0/link/0/eLvHCXMwlV1NSwMxEA2iop5UrPhtBK9bu9_J0a4tLda6YA-9lWxmVgvtrtTdgv_eyXarePDgJYSQEJhkeHlJ3gxjt34QGlRsWR5oKtKgZQkNwkqDUEkNbivBpEo2EQ6HYjyWcS1Wr7QwiFh9PsOmqVZv-ZDr0lyVkYcLE2mAyM6W73mOvZJr7bCbOnLmXf8l6vSjwCWMIurneM31iF-5Uyro6O7_c9ID1vgR4fH4G14O2QZmRyw20aSmWUl8nT-Tt89rGSW_n73mxPPf5pxOoTyO2nygPvOy4G2CKeDU46FOhUIuPeOdZb3lGmzU7YyinlUnRbCm0i4sCEFLkMao5rcT2lolPmrHEQKV5ykCIkxSXyRhAqktPUVkWaKSrgLbARfcY7aZ5RmeMJ6AE2gEpX0tPPJrFSJxPUzBh1T7aXDKGsYak_dV2IvJ2hBnf7Rfs93e6GkwGfSHj-dsz9i_Eu2JC7ZZLEq8ZNt6WUw_FlfVsn0BhHab_Q |
| openUrl | ctx_ver=Z39.88-2004&ctx_enc=info%3Aofi%2Fenc%3AUTF-8&rfr_id=info%3Asid%2Fsummon.serialssolutions.com&rft_val_fmt=info%3Aofi%2Ffmt%3Akev%3Amtx%3Abook&rft.genre=proceeding&rft.title=2024+5th+International+Symposium+on+Computer+Engineering+and+Intelligent+Communications+%28ISCEIC%29&rft.atitle=Continuous+Optimization+Algorithm+for+PCB+Layout+Based+on+Differential+Evolution&rft.au=Wang%2C+Yu&rft.au=Chen%2C+Tingting&rft.au=Chen%2C+Yu&rft.date=2024-11-08&rft.pub=IEEE&rft.spage=253&rft.epage=259&rft_id=info:doi/10.1109%2FISCEIC63613.2024.10810231&rft.externalDocID=10810231 |