Bilinear Interpolation Algorithm Based on Verilog

This paper investigates a Verilog-based implementation of a bilinear interpolation algorithm aimed at solving the problem of pixel computation during image enlargement. The bilinear interpolation algorithm, as an effective image processing method, has a wide range of applications in the fields of im...

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Vydáno v:IEEE International Conference on Electronic Information and Communication Technology (Online) s. 1375 - 1379
Hlavní autoři: Lu, Yao, Yang, Xiaoling, Jin, Yongbo
Médium: Konferenční příspěvek
Jazyk:angličtina
Vydáno: IEEE 31.07.2024
Témata:
bilinear interpolation
Design methodology
Hardware
Image processing
Image quality
image scaling
Interpolation
Real-time systems
Streaming media
Verilog
ISSN:2836-7782
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Shrnutí:This paper investigates a Verilog-based implementation of a bilinear interpolation algorithm aimed at solving the problem of pixel computation during image enlargement. The bilinear interpolation algorithm, as an effective image processing method, has a wide range of applications in the fields of image processing and computer vision. This algorithm is implemented through the Verilog programming language and includes key steps such as pixel coordinate conversion, nearest neighbor finding, and linear interpolation operations. On hardware platforms such as FPGAs, the use of fixed-point design optimizes the use of resources, improves computational efficiency, and meets real-time requirements. The correctness and effectiveness of the algorithm are verified through simulation tests. This algorithm implementation is characterized by high accuracy and speed and is suitable for real-time image processing applications. This study provides an effective reference method for the design of Verilog-based image processing algorithms, which is of great significance in promoting the development of image processing technology.
ISSN:2836-7782
DOI:10.1109/ICEICT61637.2024.10671174