Bilinear Interpolation Algorithm Based on Verilog
This paper investigates a Verilog-based implementation of a bilinear interpolation algorithm aimed at solving the problem of pixel computation during image enlargement. The bilinear interpolation algorithm, as an effective image processing method, has a wide range of applications in the fields of im...
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| Vydané v: | IEEE International Conference on Electronic Information and Communication Technology (Online) s. 1375 - 1379 |
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| Hlavní autori: | , , |
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| Jazyk: | English |
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IEEE
31.07.2024
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| ISSN: | 2836-7782 |
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| Abstract | This paper investigates a Verilog-based implementation of a bilinear interpolation algorithm aimed at solving the problem of pixel computation during image enlargement. The bilinear interpolation algorithm, as an effective image processing method, has a wide range of applications in the fields of image processing and computer vision. This algorithm is implemented through the Verilog programming language and includes key steps such as pixel coordinate conversion, nearest neighbor finding, and linear interpolation operations. On hardware platforms such as FPGAs, the use of fixed-point design optimizes the use of resources, improves computational efficiency, and meets real-time requirements. The correctness and effectiveness of the algorithm are verified through simulation tests. This algorithm implementation is characterized by high accuracy and speed and is suitable for real-time image processing applications. This study provides an effective reference method for the design of Verilog-based image processing algorithms, which is of great significance in promoting the development of image processing technology. |
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| AbstractList | This paper investigates a Verilog-based implementation of a bilinear interpolation algorithm aimed at solving the problem of pixel computation during image enlargement. The bilinear interpolation algorithm, as an effective image processing method, has a wide range of applications in the fields of image processing and computer vision. This algorithm is implemented through the Verilog programming language and includes key steps such as pixel coordinate conversion, nearest neighbor finding, and linear interpolation operations. On hardware platforms such as FPGAs, the use of fixed-point design optimizes the use of resources, improves computational efficiency, and meets real-time requirements. The correctness and effectiveness of the algorithm are verified through simulation tests. This algorithm implementation is characterized by high accuracy and speed and is suitable for real-time image processing applications. This study provides an effective reference method for the design of Verilog-based image processing algorithms, which is of great significance in promoting the development of image processing technology. |
| Author | Lu, Yao Jin, Yongbo Yang, Xiaoling |
| Author_xml | – sequence: 1 givenname: Yao surname: Lu fullname: Lu, Yao email: 102212307@hbut.edu.cn organization: Hubei University of Technology,School of Science,Wuhan,China,430068 – sequence: 2 givenname: Xiaoling surname: Yang fullname: Yang, Xiaoling email: yangxiaoling@hbut.edu.cn organization: Hubei University of Technology,School of Science,Wuhan,China,430068 – sequence: 3 givenname: Yongbo surname: Jin fullname: Jin, Yongbo email: 102312389@hbut.edu.cn organization: Hubei University of Technology,School of Science,Wuhan,China,430068 |
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| Snippet | This paper investigates a Verilog-based implementation of a bilinear interpolation algorithm aimed at solving the problem of pixel computation during image... |
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| SubjectTerms | bilinear interpolation Design methodology Hardware Image processing Image quality image scaling Interpolation Real-time systems Streaming media Verilog |
| Title | Bilinear Interpolation Algorithm Based on Verilog |
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