Algorithmic strategies for optimizing the parallel reduction primitive in CUDA
Many general-purpose applications exploit Graphics Processing Units (GPUs) by executing a set of well-known dataparallel primitives. Those primitives are usually invoked from the host many times, so their throughput has a great impact on the performance of the overall system. Thus, the study of nove...
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| Vydáno v: | 2012 International Conference on High Performance Computing and Simulation s. 511 - 519 |
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| Hlavní autoři: | , , , |
| Médium: | Konferenční příspěvek |
| Jazyk: | angličtina |
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IEEE
01.07.2012
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| ISBN: | 9781467323598, 1467323594 |
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| Abstract | Many general-purpose applications exploit Graphics Processing Units (GPUs) by executing a set of well-known dataparallel primitives. Those primitives are usually invoked from the host many times, so their throughput has a great impact on the performance of the overall system. Thus, the study of novel algorithmic strategies to optimize their implementation on current devices is an interesting topic to the GPU community. In this paper we focus on optimizing the reduction primitive, which merely reduces a data sequence into a single value using a binary associative operator. Although tree-based and sequential-based algorithms have been already implemented on GPUs, a comparison of both algorithm performance had not been carried out yet. Thus, our first contribution is to present an experimental study of state-of-the-art reduction algorithms on CUDA. Next we introduce two algorithmic optimizations that are integrated into the fastest solution (a sequential-based algorithm), improving its throughput even more. Finally, we replicate this methodology to the segmented version of the primitive, which applies when the input is composed of several independent segments. In this case, it is not clear which algorithm exhibits the best performance, since throughput deeply depends on the distribution of segments along the input. According to our results, tree-based algorithms run faster for small segments, while sequential methods are better for medium and large ones. |
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| AbstractList | Many general-purpose applications exploit Graphics Processing Units (GPUs) by executing a set of well-known dataparallel primitives. Those primitives are usually invoked from the host many times, so their throughput has a great impact on the performance of the overall system. Thus, the study of novel algorithmic strategies to optimize their implementation on current devices is an interesting topic to the GPU community. In this paper we focus on optimizing the reduction primitive, which merely reduces a data sequence into a single value using a binary associative operator. Although tree-based and sequential-based algorithms have been already implemented on GPUs, a comparison of both algorithm performance had not been carried out yet. Thus, our first contribution is to present an experimental study of state-of-the-art reduction algorithms on CUDA. Next we introduce two algorithmic optimizations that are integrated into the fastest solution (a sequential-based algorithm), improving its throughput even more. Finally, we replicate this methodology to the segmented version of the primitive, which applies when the input is composed of several independent segments. In this case, it is not clear which algorithm exhibits the best performance, since throughput deeply depends on the distribution of segments along the input. According to our results, tree-based algorithms run faster for small segments, while sequential methods are better for medium and large ones. |
| Author | Gavilanes, A. Martin, P. J. Torres, R. Ayuso, L. F. |
| Author_xml | – sequence: 1 givenname: P. J. surname: Martin fullname: Martin, P. J. email: pjmartin@sip.ucm.es organization: Dept. de Sist. Informaticos y Comput., Univ. Complutense de Madrid, Madrid, Spain – sequence: 2 givenname: L. F. surname: Ayuso fullname: Ayuso, L. F. email: lf.ayuso@fdi.ucm.es organization: Dept. de Sist. Informaticos y Comput., Univ. Complutense de Madrid, Madrid, Spain – sequence: 3 givenname: R. surname: Torres fullname: Torres, R. email: r.torres@fdi.ucm.es organization: Dept. de Sist. Informaticos y Comput., Univ. Complutense de Madrid, Madrid, Spain – sequence: 4 givenname: A. surname: Gavilanes fullname: Gavilanes, A. email: agav@sip.ucm.es organization: Dept. de Sist. Informaticos y Comput., Univ. Complutense de Madrid, Madrid, Spain |
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| Snippet | Many general-purpose applications exploit Graphics Processing Units (GPUs) by executing a set of well-known dataparallel primitives. Those primitives are... |
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| SubjectTerms | Arrays CUDA data-parallel algorithms GPGPU Graphics processing unit Instruction sets Kernel Optimization parallel reduction segmented parallel reduction Synchronization Throughput |
| Title | Algorithmic strategies for optimizing the parallel reduction primitive in CUDA |
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